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Message-ID: <1550146447-1441-1-git-send-email-claudiu.beznea@microchip.com>
Date: Thu, 14 Feb 2019 12:14:23 +0000
From: <Claudiu.Beznea@...rochip.com>
To: <mturquette@...libre.com>, <sboyd@...nel.org>,
<robh+dt@...nel.org>, <mark.rutland@....com>,
<Nicolas.Ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<Ludovic.Desroches@...rochip.com>
CC: <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <Claudiu.Beznea@...rochip.com>
Subject: [PATCH v2 0/3] add slow clock support for SAM9X60
From: Claudiu Beznea <claudiu.beznea@...rochip.com>
Hi,
This series add slow clock support for SAM9X60. Apart from previous IPs, this
one uses different offsets in control register for different functionalities.
The series adapt current driver to work for all IPs using per IP
configurations initialized at probe.
Thank you,
Claudiu Beznea
Changes in v2:
- split patch 1/1 from v1 in 2 patches: one adding register bit offsets
support (patch 1/3 from this series), one adding support for SAM9X60
(patch 2/3 from this series)
- fix compatible string from "microchip,at91sam9x60-sckc" to
"microchip,sam9x60-sckc"
Claudiu Beznea (3):
clk: at91: sckc: add support to specify registers bit offsets
clk: at91: sckc: add support for SAM9X60
dt-bindings: clk: at91: add bindings for SAM9X60's slow clock
controller
.../devicetree/bindings/clock/at91-clock.txt | 3 +-
drivers/clk/at91/sckc.c | 142 ++++++++++++++++-----
2 files changed, 109 insertions(+), 36 deletions(-)
--
2.7.4
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