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Message-ID: <20190218160954.13929-4-codrin.ciubotariu@microchip.com>
Date: Mon, 18 Feb 2019 16:10:32 +0000
From: <Codrin.Ciubotariu@...rochip.com>
To: <lars@...afoo.de>, <lgirdwood@...il.com>, <broonie@...nel.org>
CC: <alsa-devel@...a-project.org>, <linux-kernel@...r.kernel.org>,
<Codrin.Ciubotariu@...rochip.com>
Subject: [PATCH 3/5] ASoC: codecs: ad193x: Fix frame polarity for DSP_A format
From: Codrin Ciubotariu <codrin.ciubotariu@...rochip.com>
By default, the codec starts to interpret the left (first) channel on
the falling edge (low polarity) of LRCLK. However, for DSP_A, the left
channel needs to start on the rising edge of LRCLK. This patch fixes
this channel swap by toggling the bit which selects the LRCLK polarity.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@...rochip.com>
---
sound/soc/codecs/ad193x.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/sound/soc/codecs/ad193x.c b/sound/soc/codecs/ad193x.c
index c16c9969d1a0..315ec9775118 100644
--- a/sound/soc/codecs/ad193x.c
+++ b/sound/soc/codecs/ad193x.c
@@ -228,6 +228,12 @@ static int ad193x_set_dai_fmt(struct snd_soc_dai *codec_dai,
return -EINVAL;
}
+ /* For DSP_*, LRCLK's polarity must be inverted */
+ if (fmt & SND_SOC_DAIFMT_DSP_A) {
+ change_bit(ffs(AD193X_DAC_LEFT_HIGH) - 1,
+ (unsigned long *)&dac_fmt);
+ }
+
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBM_CFM: /* codec clk & frm master */
adc_fmt |= AD193X_ADC_LCR_MASTER;
--
2.17.1
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