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Date:   Mon, 18 Feb 2019 09:59:56 +0800
From:   Wei Wang <>
To:     Andi Kleen <>
CC:     "" <>,
        "" <>,
        "" <>,
        "" <>,
        "Liang, Kan" <>,
        "" <>,
        "" <>,
        "Xu, Like" <>,
        "" <>,
        "" <>,
        "" <>
Subject: Re: [PATCH v5 12/12] KVM/VMX/vPMU: support to report GLOBAL_STATUS_LBRS_FROZEN

On 02/15/2019 09:10 PM, Andi Kleen wrote:
> OK. The freeze bits need to be cleared by IA32_PERF_GLOBAL_STATUS_RESET, which seems not supported by the perf code yet (thus guest won't clear them). Would handle_irq_v4 also need to be changed to support that?
> In Arch Perfmon v4 it is  cleared by the MSR_CORE_PERF_GLOBAL_OVF_CTRL write

Not very sure about this one. The spec mentions
"IA32_PERF_GLOBAL_STATUS_RESET provides additional bit fields to clear 
the new indicators.."
IIUIC, the new freeze bits can only be cleared by RESET.

> But the guest KVM pmu doesn't support v4 so far, so the only way to clear it is through DEBUGCTL.
> STATUS_RESET would only be needed to set it from the guest, which is not necessary at least for now
> (and would be also v4)
> At some point the guest PMU should probably be updated for v4, but it can be done
> separately from this.

Agree. I think the guest perf won't work in v4 mode if the KVM vPMU 
exposes it is v3.
Probably we could also leave the freeze bits virtualization support to 
another series of vPMU v4 support?
We would also need to use the STATUS_SET in v4 to set the freeze bits of 
entering the guest (instead of clearing the guest debugctl), so that we 
could achieve architectural emulation.


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