linux-kernel - Re: [PATCH v2] ARM: pm: fix HYP/SVC mode mismatch when MCPM is used

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Message-ID: <CANAwSgRHhX8t7hDzfy2y6hggUiORRcLZ1VyM_UsDyiRTJ9L12w@mail.gmail.com>
Date:   Mon, 18 Feb 2019 09:44:18 +0530
From:   Anand Moon <linux.amoon@...il.com>
To:     Marek Szyprowski <m.szyprowski@...sung.com>
Cc:     Linux Kernel <linux-kernel@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        Russell King <rmk+kernel@...linux.org.uk>,
        Nicolas Pitre <nicolas.pitre@...aro.org>,
        Kevin Hilman <khilman@...libre.com>,
        linux-samsung-soc@...r.kernel.org,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
        Marian Mihailescu <mihailescu2m@...il.com>,
        Seung-Woo Kim <sw0312.kim@...sung.com>
Subject: Re: [PATCH v2] ARM: pm: fix HYP/SVC mode mismatch when MCPM is used

Hi Marek,

On Fri, 15 Feb 2019 at 21:40, Marek Szyprowski <m.szyprowski@...sung.com> wrote:
>
> MCPM does a soft reset of the CPUs and uses common cpu_resume() routine to
> perform low-level platform initialization. This results in a try to install
> HYP stubs for the second time for each CPU and results in false HYP/SVC
> mode mismatch detection. The HYP stubs are already installed at the
> beginning of the kernel initialization on the boot CPU (head.S) or in the
> secondary_startup() for other CPUs. To fix this issue MCPM code should use
> a cpu_resume() routine without HYP stubs installation.
>
> This change fixes HYP/SVC mode mismatch on Samsung Exynos5422-based Odroid
> XU3/XU4/HC1 boards.
>
> Fixes: 3721924c8154 ("ARM: 8081/1: MCPM: provide infrastructure to allow for MCPM loopback")
> Signed-off-by: Marek Szyprowski <m.szyprowski@...sung.com>
> Acked-by: Nicolas Pitre <nico@...aro.org>
> ---

Please add my.

Tested-by: Anand Moon <linux.amoon@...il.com>

[    0.701094] smp: Brought up 1 node, 8 CPUs
[    0.701212] SMP: Total of 8 processors activated (384.00 BogoMIPS).
[    0.701329] CPU: All CPU(s) started in HYP mode.
[    0.701421] CPU: Virtualization extensions available.


> v2:
> - fixed support for Thumb-mode kernel
> ---
>  arch/arm/common/mcpm_entry.c   |  2 +-
>  arch/arm/include/asm/suspend.h |  1 +
>  arch/arm/kernel/sleep.S        | 12 ++++++++++++
>  3 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c
> index ad574d20415c..1b1b82b37ce0 100644
> --- a/arch/arm/common/mcpm_entry.c
> +++ b/arch/arm/common/mcpm_entry.c
> @@ -381,7 +381,7 @@ static int __init nocache_trampoline(unsigned long _arg)
>         unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
>         phys_reset_t phys_reset;
>
> -       mcpm_set_entry_vector(cpu, cluster, cpu_resume);
> +       mcpm_set_entry_vector(cpu, cluster, cpu_resume_no_hyp);
>         setup_mm_for_reboot();
>
>         __mcpm_cpu_going_down(cpu, cluster);
> diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
> index 452bbdcbcc83..506314265c6f 100644
> --- a/arch/arm/include/asm/suspend.h
> +++ b/arch/arm/include/asm/suspend.h
> @@ -10,6 +10,7 @@ struct sleep_save_sp {
>  };
>
>  extern void cpu_resume(void);
> +extern void cpu_resume_no_hyp(void);
>  extern void cpu_resume_arm(void);
>  extern int cpu_suspend(unsigned long, int (*)(unsigned long));
>
> diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
> index a8257fc9cf2a..5dc8b80bb693 100644
> --- a/arch/arm/kernel/sleep.S
> +++ b/arch/arm/kernel/sleep.S
> @@ -120,6 +120,14 @@ ENDPROC(cpu_resume_after_mmu)
>         .text
>         .align
>
> +#ifdef CONFIG_MCPM
> +       .arm
> +THUMB( .thumb                  )
> +ENTRY(cpu_resume_no_hyp)
> +ARM_BE8(setend be)                     @ ensure we are in BE mode
> +       b       no_hyp
> +#endif
> +
>  #ifdef CONFIG_MMU
>         .arm
>  ENTRY(cpu_resume_arm)
> @@ -135,6 +143,7 @@ ARM_BE8(setend be)                  @ ensure we are in BE mode
>         bl      __hyp_stub_install_secondary
>  #endif
>         safe_svcmode_maskall r1
> +no_hyp:
>         mov     r1, #0
>         ALT_SMP(mrc p15, 0, r0, c0, c0, 5)
>         ALT_UP_B(1f)
> @@ -163,6 +172,9 @@ ENDPROC(cpu_resume)
>
>  #ifdef CONFIG_MMU
>  ENDPROC(cpu_resume_arm)
> +#endif
> +#ifdef CONFIG_MCPM
> +ENDPROC(cpu_resume_no_hyp)
>  #endif
>
>         .align 2
> --
> 2.17.1
>