[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <12311117.DSx6JT7Gj8@aspire.rjw.lan>
Date: Tue, 19 Feb 2019 10:59:00 +0100
From: "Rafael J. Wysocki" <rjw@...ysocki.net>
To: Xiongfeng Wang <wangxiongfeng2@...wei.com>
Cc: viresh.kumar@...aro.org, rafael@...nel.org, gcherianv@...il.com,
pprakash@...eaurora.org, george.cherian@...ium.com,
robert.moore@...el.com, linux-acpi@...r.kernel.org,
linux-kernel@...r.kernel.org, guohanjun@...wei.com,
john.garry@...wei.com
Subject: Re: [PATCH v3 0/2] Work around for Hisilicon CPPC cpufreq
On Sunday, February 17, 2019 4:54:13 AM CET Xiongfeng Wang wrote:
> Hisilicon chips do not support delivered performance counter register
> and reference performance counter register. But the platform can
> calculate the real performance using its own method. This patch provide
> a workaround for this problem, and other platforms can also use this
> workaround framework. We reuse the desired performance register to
> store the real performance calculated by the platform. After the
> platform finished the frequency adjust, it gets the real performance and
> writes it into desired performance register. OS can use it to calculate
> the real frequency.
>
> Changlog:
>
> v2 -> v3:
> Recontruct 'cppc_get_desired_perf'.
> Rename 'cppc_workaround_info' to 'cppc_workaround_oem_info'
> Drop 'get_rate' member from struct cppc_workaround_oem_info
> Change 'cppc_wa_get_rate' pointer to a flag to indicate whether
> we need to aplly the workaround.
> Move the new functions to the beginning of cppc-cpufreq.c
>
>
> Xiongfeng Wang (2):
> ACPI / CPPC: Add a helper to get desired performance
> cpufreq / cppc: Work around for Hisilicon CPPC cpufreq
>
> drivers/acpi/cppc_acpi.c | 39 +++++++++++++++++++++++++
> drivers/cpufreq/cppc_cpufreq.c | 66 ++++++++++++++++++++++++++++++++++++++++++
> include/acpi/cppc_acpi.h | 1 +
> 3 files changed, 106 insertions(+)
>
>
Both patches applied, thanks!
Powered by blists - more mailing lists