linux-kernel - [PATCH 06/10] perf/x86/intel/cstate: Support die scope counters on CLX-AP

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <1550606411-5313-7-git-send-email-kan.liang@linux.intel.com>
Date:   Tue, 19 Feb 2019 12:00:07 -0800
From:   kan.liang@...ux.intel.com
To:     peterz@...radead.org, tglx@...utronix.de, acme@...nel.org,
        mingo@...hat.com, x86@...nel.org, linux-kernel@...r.kernel.org
Cc:     len.brown@...el.com, jolsa@...hat.com, namhyung@...nel.org,
        eranian@...gle.com, ak@...ux.intel.com,
        Kan Liang <kan.liang@...ux.intel.com>
Subject: [PATCH 06/10] perf/x86/intel/cstate: Support die scope counters on CLX-AP

From: Kan Liang <kan.liang@...ux.intel.com>

CLX-AP has the same PKG Cstate counters as SKX, but they are die scope.

Add clx_ap_cstates for CLX-AP.
Share the package code with die for now.

Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
---
 arch/x86/events/intel/cstate.c | 27 ++++++++++++++++++++++++---
 1 file changed, 24 insertions(+), 3 deletions(-)

diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 5f71606..8e7d906 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -31,6 +31,7 @@
  * with the perf_event core subsystem.
  *  - 'cstate_core': The counter is available for each physical core.
  *    The counters include CORE_C*_RESIDENCY.
+ *  - 'cstate_die': The counter is available for each physical die.
  *  - 'cstate_pkg': The counter is available for each physical package.
  *    The counters include PKG_C*_RESIDENCY.
  *
@@ -118,6 +119,7 @@ struct cstate_model {
 		struct {
 			unsigned long	pkg_events;
 			unsigned long	core_events;
+			unsigned long	die_events;
 		};
 	};
 	unsigned long		quirks;
@@ -446,6 +448,17 @@ static const struct cstate_model snb_cstates __initconst = {
 				  BIT(PERF_CSTATE_PKG_C7_RES),
 };
 
+static const struct cstate_model clx_ap_cstates __initconst = {
+	.core_events		= BIT(PERF_CSTATE_CORE_C3_RES) |
+				  BIT(PERF_CSTATE_CORE_C6_RES) |
+				  BIT(PERF_CSTATE_CORE_C7_RES),
+
+	.die_events		= BIT(PERF_CSTATE_PKG_C2_RES) |
+				  BIT(PERF_CSTATE_PKG_C3_RES) |
+				  BIT(PERF_CSTATE_PKG_C6_RES) |
+				  BIT(PERF_CSTATE_PKG_C7_RES),
+};
+
 static const struct cstate_model hswult_cstates __initconst = {
 	.core_events		= BIT(PERF_CSTATE_CORE_C3_RES) |
 				  BIT(PERF_CSTATE_CORE_C6_RES) |
@@ -574,7 +587,8 @@ static bool __init cstate_probe_msr(const unsigned long evmsk,
 	int max;
 	u64 val;
 
-	if (type == PACKAGE_DOMAIN) {
+	if ((type == PACKAGE_DOMAIN) ||
+	    (type == DIE_DOMAIN)) {
 		max = PERF_CSTATE_PKG_EVENT_MAX;
 		msr = pkg_msr;
 		attrs = pkg_events_attrs;
@@ -672,7 +686,8 @@ static int __init cstate_init(void)
 			continue;
 		pmu = &cstate_pmus[i]->pmu;
 
-		if (i == PACKAGE_DOMAIN)
+		if ((i == PACKAGE_DOMAIN) ||
+		    (i == DIE_DOMAIN))
 			pmu->attr_groups = pkg_attr_groups;
 		else if (i == CORE_DOMAIN)
 			pmu->attr_groups = core_attr_groups;
@@ -707,6 +722,7 @@ static int __init cstate_init(void)
 
 static int __init cstate_pmu_init(void)
 {
+	const struct cstate_model *cstate;
 	const struct x86_cpu_id *id;
 	int err;
 
@@ -717,7 +733,12 @@ static int __init cstate_pmu_init(void)
 	if (!id)
 		return -ENODEV;
 
-	err = cstate_probe((const struct cstate_model *) id->driver_data);
+	if ((boot_cpu_data.x86_model == INTEL_FAM6_SKYLAKE_X) &&
+	    (boot_cpu_data.x86_max_dies > 1))
+		cstate = &clx_ap_cstates;
+	else
+		cstate = (const struct cstate_model *) id->driver_data;
+	err = cstate_probe(cstate);
 	if (err)
 		return err;
 
-- 
2.7.4