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Message-Id: <20190219200242.17243-6-andrew.smirnov@gmail.com>
Date: Tue, 19 Feb 2019 12:02:42 -0800
From: Andrey Smirnov <andrew.smirnov@...il.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc: Andrey Smirnov <andrew.smirnov@...il.com>,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Fabio Estevam <fabio.estevam@....com>,
Chris Healy <cphealy@...il.com>,
Lucas Stach <l.stach@...gutronix.de>,
Leonard Crestez <leonard.crestez@....com>,
"A.s. Dong" <aisheng.dong@....com>,
Richard Zhu <hongxing.zhu@....com>, linux-imx@....com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org
Subject: [PATCH 5/5] PCI: dwc: Remove superfluous shifting in definitions
Surrounding definitions no longer use explicit shift, so "<< 0" here
serve no purpose. Remove them. No functional change intended.
Signed-off-by: Andrey Smirnov <andrew.smirnov@...il.com>
Acked-by: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>
Cc: Fabio Estevam <fabio.estevam@....com>
Cc: Chris Healy <cphealy@...il.com>
Cc: Lucas Stach <l.stach@...gutronix.de>
Cc: Leonard Crestez <leonard.crestez@....com>
Cc: "A.s. Dong" <aisheng.dong@....com>
Cc: Richard Zhu <hongxing.zhu@....com>
Cc: linux-imx@....com
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org
Cc: linux-pci@...r.kernel.org
---
drivers/pci/controller/dwc/pcie-designware.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 8ebfb06584d9..f6fb65a40f10 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -60,14 +60,14 @@
#define PCIE_ATU_VIEWPORT 0x900
#define PCIE_ATU_REGION_INBOUND BIT(31)
#define PCIE_ATU_REGION_OUTBOUND 0
-#define PCIE_ATU_REGION_INDEX2 (0x2 << 0)
-#define PCIE_ATU_REGION_INDEX1 (0x1 << 0)
-#define PCIE_ATU_REGION_INDEX0 (0x0 << 0)
+#define PCIE_ATU_REGION_INDEX2 0x2
+#define PCIE_ATU_REGION_INDEX1 0x1
+#define PCIE_ATU_REGION_INDEX0 0x0
#define PCIE_ATU_CR1 0x904
-#define PCIE_ATU_TYPE_MEM (0x0 << 0)
-#define PCIE_ATU_TYPE_IO (0x2 << 0)
-#define PCIE_ATU_TYPE_CFG0 (0x4 << 0)
-#define PCIE_ATU_TYPE_CFG1 (0x5 << 0)
+#define PCIE_ATU_TYPE_MEM 0x0
+#define PCIE_ATU_TYPE_IO 0x2
+#define PCIE_ATU_TYPE_CFG0 0x4
+#define PCIE_ATU_TYPE_CFG1 0x5
#define PCIE_ATU_CR2 0x908
#define PCIE_ATU_ENABLE BIT(31)
#define PCIE_ATU_BAR_MODE_ENABLE BIT(30)
--
2.20.1
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