lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  PHC 
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 20 Feb 2019 10:04:36 +0000
From:   Marc Zyngier <>
To:     Phil Edworthy <>
Cc:     Thomas Gleixner <>,
        Jason Cooper <>,
        Geert Uytterhoeven <>,
        "" <>,
        Linus Walleij <>
Subject: Re: [PATCH v4 2/2] irqchip: Add support for Renesas RZ/N1 GPIO interrupt multiplexer

On Wed, 20 Feb 2019 09:07:02 +0000,
Phil Edworthy <> wrote:
> Hi Marc
> On 19 February 2019 20:29 Marc Zyngier wrote:


> > > +	for (i = 0; i < MAX_NR_INPUT_IRQS; i++)
> > > +		irq_create_mapping(priv->irq_domain, i);
> > 
> > This should never happen. Mappings should be created from discovering the
> > interrupt specifiers for devices in the DT, and not eagerly at probe time.
> The key issue here is that the mappings should not be dynamically
> allocated.  On the device that has this hardware, there is a Cortex
> M3 that is likely to use some of these GPIO interrupts.  Maybe it
> would be better to limit the number of GPIO irqs that Linux can
> configure dynamically.

But whatever the M3 is going to use is known statically for a given
instance of this platform, right? You can always tell from the device
tree which pins are available for Linux and which are not. Or can't you?

> Looks like I've gone off in the wrong direction yet again.

Nothing we can't help with. If you can explain all the constraints of
the platform, we can come up with a fairly simple driver. And surely
LinusW can chime in for the DT part, which seems to need some loving



Jazz is not dead, it just smell funny.

Powered by blists - more mailing lists