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Message-Id: <20190222221850.26939-8-ilina@codeaurora.org>
Date: Fri, 22 Feb 2019 15:18:48 -0700
From: Lina Iyer <ilina@...eaurora.org>
To: swboyd@...omium.org, evgreen@...omium.org, marc.zyngier@....com
Cc: linux-kernel@...r.kernel.org, rplsssn@...eaurora.org,
linux-arm-msm@...r.kernel.org, thierry.reding@...il.com,
bjorn.andersson@...aro.org, dianders@...omium.org,
linus.walleij@...aro.org, Lina Iyer <ilina@...eaurora.org>
Subject: [PATCH v3 7/9] arm64: dts: qcom: add PDC interrupt controller for SDM845
Add PDC interrupt controller device bindings for SDM845.
Signed-off-by: Lina Iyer <ilina@...eaurora.org>
---
Changes in v2:
- Use updated address specification in reg
- Rename to pdc_intc
- Sort per address in DT
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index c27cbd3bcb0a..e55100c2705e 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1534,6 +1534,15 @@
#power-domain-cells = <1>;
};
+ pdc_intc: interrupt-controller@...0000 {
+ compatible = "qcom,sdm845-pdc";
+ reg = <0 0x0b220000 0 0x30000>;
+ qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&intc>;
+ interrupt-controller;
+ };
+
tsens0: thermal-sensor@...3000 {
compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
reg = <0xc263000 0x1ff>, /* TM */
--
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