linux-kernel - RE: [PATCH 2/3] net: ethernet: add c45 PHY support in MDIO read/write functions.

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Message-ID: <CO2PR07MB24695EDFACCBD9589EADF533C17A0@CO2PR07MB2469.namprd07.prod.outlook.com>
Date:   Mon, 25 Feb 2019 08:18:57 +0000
From:   Parshuram Raju Thombare <pthombar@...ence.com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     "nicolas.ferre@...rochip.com" <nicolas.ferre@...rochip.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "f.fainelli@...il.com" <f.fainelli@...il.com>,
        "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Rafal Ciepiela <rafalc@...ence.com>,
        Piotr Sroka <piotrs@...ence.com>, Jan Kotas <jank@...ence.com>
Subject: RE: [PATCH 2/3] net: ethernet: add c45 PHY support in MDIO read/write
 functions.

>> >On Fri, Feb 22, 2019 at 08:12:42PM +0000, Parshuram Thombare wrote:
>> >> This patch modify MDIO read/write functions to support
>> >> communication with C45 PHY in Cadence ethernet controller driver.
>> >
>> >Hi Parshuram
>> >
>> >Are all versions of the MDIO controller capable of doing C45?
>> >
>> >    Andrew
>> Now driver support c22 and c45 PHY.
>> Are you suggesting to add check for C45 PHY using is_c45 in phydev ?
>
>You are unconditionally supporting C45. Are there versions of the hardware which
>don't actually support C45? You have this endless loop:
There is controller which don't support C45. I will add check for that using is_c45.
>
>+       /* wait for end of transfer */
>+       while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
>+               cpu_relax();
>
>If there is hardware which does not support C45, will this loop forever?
>
>	Andrew
Yes, this bit is supposed to be set. I will add timeout here.

Regards,
Parshuram Thombare