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Message-ID: <TYAPR01MB4015D859E542280ABB5D9DC2DF7A0@TYAPR01MB4015.jpnprd01.prod.outlook.com>
Date: Mon, 25 Feb 2019 09:28:16 +0000
From: Gareth Williams <gareth.williams.jx@...esas.com>
To: Wolfram Sang <wsa@...-dreams.de>
CC: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Jarkko Nikula <jarkko.nikula@...ux.intel.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Mika Westerberg <mika.westerberg@...ux.intel.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>,
"linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Phil Edworthy <phil.edworthy@...esas.com>
Subject: RE: [PATCH v4 0/2] i2c: designware: Add support for a bus clock
> On Sat, Feb 23, 2019 at 09:32 +0100, wsa@...-dreams.de wrote:
>> On Thu, Feb 21, 2019 at 04:10:57PM +0000, Gareth Williams wrote:
>> The Synopsys I2C Controller has a peripheral clock that some SoCs
>> require to access the registers. This series also details the new
>> clock property in the bindings documentation.
>
> On Sat, Feb 23, 2019 at 09:32 +0100, wsa@...-dreams.de wrote:
> Your SoB is missing for patch 1. And besides my ack, I'd still like some feedback from the actual driver maintainers.
Thanks for the feedback Wolfram. I will wait for input from the driver maintainers.
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