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Message-ID: <f02865a5b9cd3cde711d818ccbb25f6b7b95a4cf.camel@nxp.com>
Date: Mon, 25 Feb 2019 13:23:41 +0000
From: Daniel Baluta <daniel.baluta@....com>
To: "shawnguo@...nel.org" <shawnguo@...nel.org>
CC: dl-linux-imx <linux-imx@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
Aisheng Dong <aisheng.dong@....com>,
"ccaione@...libre.com" <ccaione@...libre.com>,
"angus@...ea.ca" <angus@...ea.ca>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
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"baruch@...s.co.il" <baruch@...s.co.il>,
"mark.rutland@....com" <mark.rutland@....com>,
Abel Vesa <abel.vesa@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"S.j. Wang" <shengjiu.wang@....com>,
Anson Huang <anson.huang@....com>,
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Subject: Re: [PATCH 1/5] arm64: dts: imx8mq: Add SDMA nodes
Please ignore this, I sent it from the wrong repo. I swear that I
double checked.
Will sent v2 with correct base.
On Mon, 2019-02-25 at 13:17 +0000, Daniel Baluta wrote:
> SDMA1 is part of AIPS-3 region and SDMA2 is part
> of AIPS-1 region.
>
> Signed-off-by: Anson Huang <Anson.Huang@....com>
> [initial submit in i.MX internal tree]
> Signed-off-by: Daniel Baluta <daniel.baluta@....com>
> [adaptation for linux-next]
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22
> ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 9155bd4784eb..87839c5c8a7f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -234,6 +234,17 @@
> status = "disabled";
> };
>
> + sdma2: sdma@...c0000 {
> + compatible = "fsl,imx8mq-sdma",
> "fsl,imx7d-sdma";
> + reg = <0x302c0000 0x10000>;
> + interrupts = <GIC_SPI 103
> IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>,
> + <&clk IMX8MQ_CLK_SDMA2_ROOT>;
> + clock-names = "ipg", "ahb";
> + #dma-cells = <3>;
> + fsl,sdma-ram-script-name =
> "imx/sdma/sdma-imx7d.bin";
> + };
> +
> iomuxc: iomuxc@...30000 {
> compatible = "fsl,imx8mq-iomuxc";
> reg = <0x30330000 0x10000>;
> @@ -575,6 +586,17 @@
> status = "disabled";
> };
>
> + sdma1: sdma@...d0000 {
> + compatible = "fsl,imx8mq-sdma",
> "fsl,imx7d-sdma";
> + reg = <0x30bd0000 0x10000>;
> + interrupts = <GIC_SPI 2
> IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
> + <&clk IMX8MQ_CLK_SDMA1_ROOT>;
> + clock-names = "ipg", "ahb";
> + #dma-cells = <3>;
> + fsl,sdma-ram-script-name =
> "imx/sdma/sdma-imx7d.bin";
> + };
> +
> fec1: ethernet@...e0000 {
> compatible = "fsl,imx8mq-fec",
> "fsl,imx6sx-fec";
> reg = <0x30be0000 0x10000>;
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