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Message-ID: <907041d1-8412-22ca-3716-109a56251850@cogentembedded.com>
Date: Mon, 25 Feb 2019 19:29:17 +0300
From: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To: "Vignesh R (by way of Boris Brezillon <bbrezillon@...nel.org>)"
<vigneshr@...com>, David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>,
Boris Brezillon <bbrezillon@...nel.org>,
Marek Vasut <marek.vasut@...il.com>,
Richard Weinberger <richard@....at>,
Rob Herring <robh+dt@...nel.org>
Cc: devicetree@...r.kernel.org, Arnd Bergmann <arnd@...db.de>,
tudor.ambarus@...rochip.com,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
nsekhar@...com, linux-kernel@...r.kernel.org,
linux-mtd@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [RFC PATCH 5/5] mtd: hyperbus: Add driver for TI's Hyperbus
memory controller
Hello!
On 02/19/2019 09:36 AM, Vignesh R (by way of Boris Brezillon <bbrezillon@...nel.org>) wrote:
> Add driver for Hyperbus memory controller on TI's AM654 SoC. Programming
> IP is pretty simple and provides direct memory mapped access to
> connected Flash devices.
Are you sure you posted the _complete_ driver?
> Add basic support for the IP without DMA. Second ChipSelect is not
> supported for now.
>
> Signed-off-by: Vignesh R <vigneshr@...com>
> ---
> drivers/mtd/hyperbus/hbmc_am654.c | 105 ++++++++++++++++++++++++++++++
> 1 file changed, 105 insertions(+)
> create mode 100644 drivers/mtd/hyperbus/hbmc_am654.c
>
> diff --git a/drivers/mtd/hyperbus/hbmc_am654.c b/drivers/mtd/hyperbus/hbmc_am654.c
> new file mode 100644
> index 000000000000..1f0d2dc52f9f
> --- /dev/null
> +++ b/drivers/mtd/hyperbus/hbmc_am654.c
> @@ -0,0 +1,105 @@
[...]
> +static int am654_hbmc_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct am654_hbmc_priv *priv;
> + struct resource *res;
> + int err;
> +
> + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + platform_set_drvdata(pdev, priv);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (IS_ERR(res)) {
> + dev_err(&pdev->dev, "failed to get memory resource\n");
> + return -ENOENT;
> + }
> +
> + priv->regbase = devm_ioremap_resource(dev, res);
> + if (IS_ERR(priv->regbase)) {
> + dev_err(dev, "Cannot remap controller address.\n");
> + return PTR_ERR(priv->regbase);
> + }
> +
> + pm_runtime_enable(&pdev->dev);
> + err = pm_runtime_get_sync(&pdev->dev);
That's all nice but where's the code that accesses the actual registers?
> + if (err < 0) {
> + pm_runtime_put_noidle(&pdev->dev);
Calling "put" with previously failed "get" sees strange...
> + return err;
> + }
> +
> + priv->hbdev.needs_calib = true;
> + priv->hbdev.dev = &pdev->dev;
> + priv->hbdev.np = of_get_next_child(dev->of_node, NULL);
> + err = hb_register_device(&priv->hbdev);
> + if (err) {
> + dev_err(&pdev->dev, "failed to register controller\n");
> + goto err_destroy;
> + }
> +
> + return 0;
> +
> +err_destroy:
> + hb_unregister_device(&priv->hbdev);
Calling "unregister" with "register" previously failed also looks strange...
> + pm_runtime_put_sync(&pdev->dev);
Why the sync() version?
> + return err;
> +}
[...]
MBR, Sergei
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