linux-kernel - Re: [PATCH V2 3/8] dt-bindings: net: stmmac: add phys config properties

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Tue, 26 Feb 2019 10:30:12 +0000
From:   Christophe ROULLIER <christophe.roullier@...com>
To:     Rob Herring <robh@...nel.org>
CC:     "davem@...emloft.net" <davem@...emloft.net>,
        "joabreu@...opsys.com" <joabreu@...opsys.com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "mcoquelin.stm32@...il.com" <mcoquelin.stm32@...il.com>,
        Alexandre TORGUE <alexandre.torgue@...com>,
        Peppe CAVALLARO <peppe.cavallaro@...com>,
        "linux-stm32@...md-mailman.stormreply.com" 
        <linux-stm32@...md-mailman.stormreply.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "andrew@...n.ch" <andrew@...n.ch>
Subject: Re: [PATCH V2 3/8] dt-bindings: net: stmmac: add phys config
 properties

On 2/23/19 1:16 AM, Rob Herring wrote:
> On Fri, Feb 22, 2019 at 09:28:04AM +0100, Christophe Roullier wrote:
>> Add properties to support all Phy config
>>   PHY_MODE	(MII,GMII, RMII, RGMII) and in normal, PHY wo crystal (25Mhz),
>>   PHY wo crystal (50Mhz), No 125Mhz from PHY config.
>>
>> Signed-off-by: Christophe Roullier <christophe.roullier@...com>
>> ---
>>   Documentation/devicetree/bindings/net/stm32-dwmac.txt | 6 +++---
>>   1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.txt b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
>> index 1341012..f42dc68 100644
>> --- a/Documentation/devicetree/bindings/net/stm32-dwmac.txt
>> +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
>> @@ -24,9 +24,9 @@ Required properties:
>>   	       encompases the glue register, and the offset of the control register.
>>   
>>   Optional properties:
>> -- clock-names:     For MPU family "mac-clk-ck" for PHY without quartz
>> -- st,int-phyclk (boolean) :  valid only where PHY do not have quartz and need to be clock
>> -	           by RCC
> 
> You can't just remove properties.

There is no risk to remove/rename these 2 properties, because it is 
specific board which is never deployed.
With new properties (renaming clock (eth-ck) + st,eth_clk_sel and 
st,eth_ref_clk_sel, we are managed all kind of specific boards stm32mp1
So no risk of backward compatible.

> 
>> +- clock-names:     For MPU family "eth-ck" for PHY without quartz
>> +- st,eth_clk_sel (boolean) : set this property in RGMII PHY when you do not want use 125Mhz
>> +- st,eth_ref_clk_sel (boolean) :  set this property in RMII mode when you have PHY without crystal 50MHz
> 
> s/_/-/
> 
> 'sel' I assume is short for select, but the naming here and description
> don't really tell me what I'm getting.
> 

Ok, Rob, I will update with your recommendations

> Rob
>