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Date: Wed, 27 Feb 2019 11:16:12 +0100 From: Ard Biesheuvel <ard.biesheuvel@...aro.org> To: Marc Zyngier <marc.zyngier@....com> Cc: Brian Norris <briannorris@...omium.org>, Ganapathi Bhat <gbhat@...vell.com>, Jeffy Chen <jeffy.chen@...k-chips.com>, Heiko Stuebner <heiko@...ech.de>, Devicetree List <devicetree@...r.kernel.org>, Xinming Hu <huxinming820@...il.com>, "<netdev@...r.kernel.org>" <netdev@...r.kernel.org>, linux-pm <linux-pm@...r.kernel.org>, "<linux-wireless@...r.kernel.org>" <linux-wireless@...r.kernel.org>, Linux Kernel Mailing List <linux-kernel@...r.kernel.org>, Amitkumar Karwar <amitkarwar@...il.com>, linux-rockchip@...ts.infradead.org, Nishant Sarmukadam <nishants@...vell.com>, Rob Herring <robh+dt@...nel.org>, "Rafael J. Wysocki" <rjw@...ysocki.net>, linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>, Enric Balletbo i Serra <enric.balletbo@...labora.com>, Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>, "David S. Miller" <davem@...emloft.net>, Kalle Valo <kvalo@...eaurora.org>, Tony Lindgren <tony@...mide.com> Subject: Re: [PATCH 0/4] mwifiex PCI/wake-up interrupt fixes On Wed, 27 Feb 2019 at 11:02, Marc Zyngier <marc.zyngier@....com> wrote: > > + Lorenzo > > Hi Brian, > > On 26/02/2019 23:28, Brian Norris wrote: > > + others > > > > Hi Marc, > > > > Thanks for the series. I have a few bits of history to add to this, and > > some comments. > > > > On Sun, Feb 24, 2019 at 02:04:22PM +0000, Marc Zyngier wrote: > >> For quite some time, I wondered why the PCI mwifiex device built in my > >> Chromebook was unable to use the good old legacy interrupts. But as MSIs > >> were working fine, I never really bothered investigating. I finally had a > >> look, and the result isn't very pretty. > >> > >> On this machine (rk3399-based kevin), the wake-up interrupt is described as > >> such: > >> > >> &pci_rootport { > >> mvl_wifi: wifi@0,0 { > >> compatible = "pci1b4b,2b42"; > >> reg = <0x83010000 0x0 0x00000000 0x0 0x00100000 > >> 0x83010000 0x0 0x00100000 0x0 0x00100000>; > >> interrupt-parent = <&gpio0>; > >> interrupts = <8 IRQ_TYPE_LEVEL_LOW>; > >> pinctrl-names = "default"; > >> pinctrl-0 = <&wlan_host_wake_l>; > >> wakeup-source; > >> }; > >> }; > >> > >> Note how the interrupt is part of the properties directly attached to the > >> PCI node. And yet, this interrupt has nothing to do with a PCI legacy > >> interrupt, as it is attached to the wake-up widget that bypasses the PCIe RC > >> altogether (Yay for the broken design!). This is in total violation of the > >> IEEE Std 1275-1994 spec[1], which clearly documents that such interrupt > >> specifiers describe the PCI device interrupts, and must obey the > >> INT-{A,B,C,D} mapping. Oops! > > > > You're not the first person to notice this. All the motivations are not > > necessarily painted clearly in their cover letter, but here are some > > previous attempts at solving this problem: > > > > [RFC PATCH v11 0/5] PCI: rockchip: Move PCIe WAKE# handling into pci core > > https://lkml.kernel.org/lkml/20171225114742.18920-1-jeffy.chen@rock-chips.com/ > > http://lkml.kernel.org/lkml/20171226023646.17722-1-jeffy.chen@rock-chips.com/ > > > > As you can see by the 12th iteration, it wasn't left unsolved for lack > > of trying... > > I wasn't aware of this. That's definitely a better approach than my > hack, and I would really like this to be revived. > I don't think this approach is entirely sound either. >From the side of the PCI device, WAKE# is just a GPIO line, and how it is wired into the system is an entirely separate matter. So I don't think it is justified to overload the notion of legacy interrupts with some other pin that may behave in a way that is vaguely similar to how a true wake-up capable interrupt works. So I'd argue that we should add an optional 'wake-gpio' DT property instead to the generic PCI device binding, and leave the interrupt binding and discovery alone.
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