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Message-ID: <20190227121232.24873-1-benjamin.gaignard@st.com>
Date: Wed, 27 Feb 2019 13:12:25 +0100
From: Benjamin Gaignard <benjamin.gaignard@...com>
To: <broonie@...nel.org>, <robh@...nel.org>, <arnd@...db.de>,
<shawnguo@...nel.org>, <s.hauer@...gutronix.de>,
<fabio.estevam@....com>
CC: <linux-kernel@...r.kernel.org>, <loic.pallardy@...com>,
<benjamin.gaignard@...aro.org>, <kernel@...gutronix.de>,
<linux-imx@....com>, <linux-arm-kernel@...ts.infradead.org>,
Benjamin Gaignard <benjamin.gaignard@...com>
Subject: [PATCH 0/7] Introduce bus domains controller framework
Bus domains controllers allow to divided system on chip into multiple domains
that can be used to select by who hardware blocks could be accessed.
A domain could be a cluster of CPUs (or coprocessors), a range of addresses or
a group of hardware blocks.
Framework architecture is inspirated by pinctrl framework:
- a default configuration could be applied before bind the driver
- configurations could be apllied dynamically by drivers
- device node provides the bus domains configurations
An example of bus domains controller is STM32 ETZPC hardware block
which got 3 domains:
- secure: hardware blocks are only accessible by software running on trust
zone.
- non-secure: hardware blocks are accessible by non-secure software (i.e.
linux kernel).
- coprocessor: hardware blocks are only accessible by the corpocessor.
Up to 94 hardware blocks of the soc could be managed by ETZPC and
assigned to one of the three domains.
At least two other hardware blocks can take benefits of this:
- ARM TZC-400: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.d...
which is able to manage up to 8 regions in address space.
- IMX Ressource Domain Controller (RDC): supports four domains and up to eight regions
This version has been rebased on top of v5.0-rc8.
Benjamin
Benjamin Gaignard (7):
devicetree: bindings: Document domains controller bindings
domainsctrl: Introduce domains controller framework
base: Add calls to domains controller
devicetree: bindings: domainsctrl: Add STM32 ETZPC bindings
bus: domainsctrl: Add driver for STM32 ETZPC controller
ARM: dts: stm32: Add domainsctrl node for stm32mp157 SoC
ARM: dts: stm32: enable domains controller node on stm32mp157c-ed1
.../bindings/bus/domains/domainsctrl.txt | 55 +++++
.../bindings/bus/domains/st,stm32-etzpc.txt | 14 ++
arch/arm/boot/dts/stm32mp157c-ev1.dts | 2 +
arch/arm/boot/dts/stm32mp157c.dtsi | 7 +
drivers/base/dd.c | 9 +
drivers/bus/Kconfig | 2 +
drivers/bus/Makefile | 2 +
drivers/bus/domains/Kconfig | 14 ++
drivers/bus/domains/Makefile | 2 +
drivers/bus/domains/domainsctrl.c | 234 +++++++++++++++++++++
drivers/bus/domains/stm32-etzpc.c | 140 ++++++++++++
include/dt-bindings/bus/domains/stm32-etzpc.h | 25 +++
include/linux/domainsctrl.h | 70 ++++++
13 files changed, 576 insertions(+)
create mode 100644 Documentation/devicetree/bindings/bus/domains/domainsctrl.txt
create mode 100644 Documentation/devicetree/bindings/bus/domains/st,stm32-etzpc.txt
create mode 100644 drivers/bus/domains/Kconfig
create mode 100644 drivers/bus/domains/Makefile
create mode 100644 drivers/bus/domains/domainsctrl.c
create mode 100644 drivers/bus/domains/stm32-etzpc.c
create mode 100644 include/dt-bindings/bus/domains/stm32-etzpc.h
create mode 100644 include/linux/domainsctrl.h
--
2.15.0
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