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Message-Id: <1551279245-25888-2-git-send-email-Tianyu.Lan@microsoft.com>
Date: Wed, 27 Feb 2019 22:54:03 +0800
From: lantianyu1986@...il.com
To: kys@...rosoft.com, haiyangz@...rosoft.com, sthemmin@...rosoft.com,
sashal@...nel.org, tglx@...utronix.de, mingo@...hat.com,
bp@...en8.de, hpa@...or.com, x86@...nel.org, joro@...tes.org,
davem@...emloft.net, mchehab+samsung@...nel.org,
gregkh@...uxfoundation.org, nicolas.ferre@...rochip.com,
arnd@...db.de, michael.h.kelley@...rosoft.com, vkuznets@...hat.com,
alex.williamson@...hat.com, dan.carpenter@...cle.com
Cc: Lan Tianyu <Tianyu.Lan@...rosoft.com>,
linux-kernel@...r.kernel.org, devel@...uxdriverproject.org,
iommu@...ts.linux-foundation.org, linux-hyperv@...r.kernel.org
Subject: [PATCH V6 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available
From: Lan Tianyu <Tianyu.Lan@...rosoft.com>
Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
set x2apic destination mode to physcial mode when x2apic is available
and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have
8-bit APIC id.
Reviewed-by: Thomas Gleixner <tglx@...utronix.de>
Reviewed-by: Michael Kelley <mikelley@...rosoft.com>
Signed-off-by: Lan Tianyu <Tianyu.Lan@...rosoft.com>
---
Change since v5:
- Fix comile error due to x2apic_phys
Change since v2:
- Fix compile error due to x2apic_phys
- Fix comment indent
Change since v1:
- Remove redundant extern for x2apic_phys
---
arch/x86/kernel/cpu/mshyperv.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index e81a2db..3fa238a 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -328,6 +328,18 @@ static void __init ms_hyperv_init_platform(void)
# ifdef CONFIG_SMP
smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu;
# endif
+
+ /*
+ * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
+ * set x2apic destination mode to physcial mode when x2apic is available
+ * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs
+ * have 8-bit APIC id.
+ */
+# ifdef CONFIG_X86_X2APIC
+ if (x2apic_supported())
+ x2apic_phys = 1;
+# endif
+
#endif
}
--
2.7.4
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