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Message-Id: <1551361930-24434-1-git-send-email-gareth.williams.jx@renesas.com>
Date: Thu, 28 Feb 2019 13:52:08 +0000
From: Gareth Williams <gareth.williams.jx@...esas.com>
To: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Wolfram Sang <wsa@...-dreams.de>,
Jarkko Nikula <jarkko.nikula@...ux.intel.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: Gareth Williams <gareth.williams.jx@...esas.com>,
Phil Edworthy <phil.edworthy@...esas.com>,
devicetree@...r.kernel.org, linux-i2c@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v5 0/2] i2c: designware: Add support for a bus clock
The Synopsys I2C Controller has an interface clock that some SoCs
require to access the registers. This series also details the new clock
property in the bindings documentation.
v5:
- Code comments and commit messages updated to reference "interface clock"
instead of "peripheral clock".
v4:
- Code comments and commit messages updated to reference "peripheral
clock"
instead of "bus clock".
v3:
- busclk renamed to pclk.
- Added comment with dw_i2c_dev struct definition describing pclk.
- Added enable rollback of first clock if second fails to enable.
- Changed clocks and clock-names sections to use term "peripheral clock"
(pclk) instead of "bus clock" (busclk) in dt-bindings documentation.
v2:
- Use new devm_clk_get_optional() function as it simplifies handling when
the optional clock is not present.
Phil Edworthy (2):
dt: snps,designware-i2c: Add clock bindings documentation
i2c: designware: Add support for an interface clock
.../devicetree/bindings/i2c/i2c-designware.txt | 9 +++++++++
drivers/i2c/busses/i2c-designware-common.c | 18 ++++++++++++++++--
drivers/i2c/busses/i2c-designware-core.h | 2 ++
drivers/i2c/busses/i2c-designware-platdrv.c | 5 +++++
4 files changed, 32 insertions(+), 2 deletions(-)
--
2.7.4
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