linux-kernel - [PATCH 5/7] ARM: dts: stm32: add sdmmc1 support on stm32mp157c

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Message-ID: <1551430068-9456-6-git-send-email-ludovic.Barre@st.com>
Date:   Fri, 1 Mar 2019 09:47:46 +0100
From:   Ludovic Barre <ludovic.Barre@...com>
To:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>
CC:     Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        Ludovic Barre <ludovic.barre@...com>
Subject: [PATCH  5/7] ARM: dts: stm32: add sdmmc1 support on stm32mp157c

From: Ludovic Barre <ludovic.barre@...com>

This patch adds support of sdmmc1 on stm32mp157c.

Signed-off-by: Ludovic Barre <ludovic.barre@...com>
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index f8bbfff..667f560 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -1050,6 +1050,20 @@
 			status = "disabled";
 		};
 
+		sdmmc1: sdmmc@...05000 {
+			compatible = "arm,pl18x", "arm,primecell";
+			arm,primecell-periphid = <0x10153180>;
+			reg = <0x58005000 0x1000>;
+			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names	= "cmd_irq";
+			clocks = <&rcc SDMMC1_K>;
+			clock-names = "apb_pclk";
+			resets = <&rcc SDMMC1_R>;
+			cap-sd-highspeed;
+			cap-mmc-highspeed;
+			max-frequency = <120000000>;
+		};
+
 		crc1: crc@...09000 {
 			compatible = "st,stm32f7-crc";
 			reg = <0x58009000 0x400>;
-- 
2.7.4