[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1551430068-9456-3-git-send-email-ludovic.Barre@st.com>
Date: Fri, 1 Mar 2019 09:47:43 +0100
From: Ludovic Barre <ludovic.Barre@...com>
To: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
CC: Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
Ludovic Barre <ludovic.barre@...com>
Subject: [PATCH 2/7] ARM: dts: stm32: add sdmmc1 support on stm32h743
From: Ludovic Barre <ludovic.barre@...com>
This patch adds support of sdmmc1 on stm32h743.
Signed-off-by: Ludovic Barre <ludovic.barre@...com>
---
arch/arm/boot/dts/stm32h743.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index cbdd69c..7c47129 100644
--- a/arch/arm/boot/dts/stm32h743.dtsi
+++ b/arch/arm/boot/dts/stm32h743.dtsi
@@ -337,6 +337,20 @@
dma-requests = <32>;
};
+ sdmmc1: sdmmc@...07000 {
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x10153180>;
+ reg = <0x52007000 0x1000>;
+ interrupts = <49>;
+ interrupt-names = "cmd_irq";
+ clocks = <&rcc SDMMC1_CK>;
+ clock-names = "apb_pclk";
+ resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <120000000>;
+ };
+
exti: interrupt-controller@...00000 {
compatible = "st,stm32h7-exti";
interrupt-controller;
--
2.7.4
Powered by blists - more mailing lists