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Message-ID: <1551768439.22671.4.camel@mtksdaap41>
Date: Tue, 5 Mar 2019 14:47:19 +0800
From: James Liao <jamesjj.liao@...iatek.com>
To: Weiyi Lu <weiyi.lu@...iatek.com>
CC: Nicolas Boichat <drinkcat@...omium.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Stephen Boyd <sboyd@...eaurora.org>,
Rob Herring <robh@...nel.org>,
Fan Chen <fan.chen@...iatek.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>, <linux-clk@...r.kernel.org>,
<srv_heupstream@...iatek.com>, <stable@...r.kernel.org>
Subject: Re: [PATCH v5 6/9] clk: mediatek: Add flags support for mtk_gate
data
On Tue, 2019-03-05 at 13:05 +0800, Weiyi Lu wrote:
> On some Mediatek platforms, there are critical clocks of
> clock gate type.
> To register clock gate with flags CLK_IS_CRITICAL,
> we need to add the flags field in mtk_gate data and register APIs.
>
> Signed-off-by: Weiyi Lu <weiyi.lu@...iatek.com>
Reviewed-by: James Liao <jamesjj.liao@...iatek.com>
> ---
> drivers/clk/mediatek/clk-gate.c | 5 +++--
> drivers/clk/mediatek/clk-gate.h | 3 ++-
> drivers/clk/mediatek/clk-mtk.c | 3 ++-
> drivers/clk/mediatek/clk-mtk.h | 1 +
> 4 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c
> index 934bf0e45e26..85daf826619a 100644
> --- a/drivers/clk/mediatek/clk-gate.c
> +++ b/drivers/clk/mediatek/clk-gate.c
> @@ -157,7 +157,8 @@ struct clk *mtk_clk_register_gate(
> int clr_ofs,
> int sta_ofs,
> u8 bit,
> - const struct clk_ops *ops)
> + const struct clk_ops *ops,
> + unsigned long flags)
> {
> struct mtk_clk_gate *cg;
> struct clk *clk;
> @@ -168,7 +169,7 @@ struct clk *mtk_clk_register_gate(
> return ERR_PTR(-ENOMEM);
>
> init.name = name;
> - init.flags = CLK_SET_RATE_PARENT;
> + init.flags = flags | CLK_SET_RATE_PARENT;
> init.parent_names = parent_name ? &parent_name : NULL;
> init.num_parents = parent_name ? 1 : 0;
> init.ops = ops;
> diff --git a/drivers/clk/mediatek/clk-gate.h b/drivers/clk/mediatek/clk-gate.h
> index 72ef89b3ad7b..9f766dfe1d57 100644
> --- a/drivers/clk/mediatek/clk-gate.h
> +++ b/drivers/clk/mediatek/clk-gate.h
> @@ -47,6 +47,7 @@ struct clk *mtk_clk_register_gate(
> int clr_ofs,
> int sta_ofs,
> u8 bit,
> - const struct clk_ops *ops);
> + const struct clk_ops *ops,
> + unsigned long flags);
>
> #endif /* __DRV_CLK_GATE_H */
> diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
> index 9c0ae4278a94..35359e5397c7 100644
> --- a/drivers/clk/mediatek/clk-mtk.c
> +++ b/drivers/clk/mediatek/clk-mtk.c
> @@ -130,7 +130,8 @@ int mtk_clk_register_gates(struct device_node *node,
> gate->regs->set_ofs,
> gate->regs->clr_ofs,
> gate->regs->sta_ofs,
> - gate->shift, gate->ops);
> + gate->shift, gate->ops,
> + gate->flags);
>
> if (IS_ERR(clk)) {
> pr_err("Failed to register clk %s: %ld\n",
> diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
> index 11b5517903d0..928905496c4b 100644
> --- a/drivers/clk/mediatek/clk-mtk.h
> +++ b/drivers/clk/mediatek/clk-mtk.h
> @@ -158,6 +158,7 @@ struct mtk_gate {
> const struct mtk_gate_regs *regs;
> int shift;
> const struct clk_ops *ops;
> + unsigned long flags;
> };
>
> int mtk_clk_register_gates(struct device_node *node,
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