linux-kernel - RE: linux-pci: pci-mvebu driver issue - can not find device behind the PCIE-Swtich

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Date:   Tue, 5 Mar 2019 09:22:09 +0000
From:   <Tian.Duan@...rochip.com>
To:     <linux-kernel@...r.kernel.org>
Subject: RE: linux-pci: pci-mvebu driver issue - can not find device behind
 the PCIE-Swtich

I think it maybe due to the incorrect requester id, but I don't know where to modify it.

-----Original Message-----
From: Tian Duan - A30576 
Sent: Tuesday, March 5, 2019 4:36 PM
To: 'linux-kernel@...r.kernel.org' <linux-kernel@...r.kernel.org>
Subject: linux-pci: pci-mvebu driver issue - can not find device behind the PCIE-Swtich

Hi, All

I found a PCI issue related PCI-MCEBU driver, the device behind the PCIE Switch cannot be found after PCI enumeration.

The issued Setup:
SDK-board          Armanda-xp
CPU                     armV7, big-endian
OS                        Linux RD_AXP_SHERWOOD 4.11.3 #18 SMP Mon Mar 4 18:09:35 CST 2019 armv7b Marvell Armada 370/XP (Device Tree) GNU/Linux

First I have other setups  which can prove the PCIE Switch and FPGA works well, the FPGA chip and PCIE-Swtich is designed by my company, the topology of the setup is as:

CPU ←-----------→ PCIE SW ←--------------→ FPGA

After pci enumeration, CPU can see the PCEI SW, but not the FPGA.

[root@...AXP_SHERWOOD ~]# /usr/sbin/lspci
00:01.0 PCI bridge: Marvell Technology Group Ltd. Device 7846 (rev 02)
00:02.0 PCI bridge: Marvell Technology Group Ltd. Device 7846 (rev 02)
00:03.0 PCI bridge: Marvell Technology Group Ltd. Device 7846 (rev 02)
00:04.0 PCI bridge: Marvell Technology Group Ltd. Device 7846 (rev 02)
00:07.0 PCI bridge: Marvell Technology Group Ltd. Device 7846 (rev 02)
00:08.0 PCI bridge: Marvell Technology Group Ltd. Device 7846 (rev 02)
00:09.0 PCI bridge: Marvell Technology Group Ltd. Device 7846 (rev 02)
00:0a.0 PCI bridge: Marvell Technology Group Ltd. Device 7846 (rev 02)
/* PCIE Switch */
03:00.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:00.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:01.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:02.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:03.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:04.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:05.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:06.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:07.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:08.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:09.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:0a.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:0b.0 PCI bridge: PMC-Sierra Inc. Device 8533
04:0c.0 PCI bridge: PMC-Sierra Inc. Device 8533
/* PCIE Switch */

[root@...AXP_SHERWOOD ~]# /usr/sbin/lspci -t
-[0000:00]-+-01.0-[01]--
           +-02.0-[02]--
           +-03.0-[03-11]----00.0-[04-11]--+-00.0-[05]--
           |                               +-01.0-[06]--
           |                               +-02.0-[07]--
           |                               +-03.0-[08]--
           |                               +-04.0-[09]--
           |                               +-05.0-[0a]--
           |                               +-06.0-[0b]--
           |                               +-07.0-[0c]--
           |                               +-08.0-[0d]--
           |                               +-09.0-[0e]--
           |                               +-0a.0-[0f]--
           |                               +-0b.0-[10]--
           |                               \-0c.0-[11]--
           +-04.0-[12]--
           +-07.0-[13]--
           +-08.0-[14]--
           +-09.0-[15]--
           \-0a.0-[16]--

Bus 4-11 is upstream and downstream of PCIE switch, the FPGA should be under bus 5.

From CPU side, during the pci enumeration, it can be seen that
pci_scan_single_device -> pci_bus_read_dev_vendor_id on the FPGA, and the function return 0xFFFFFFFF, so CPU think it has no device which connected to PCI 04:0.0 .

From the PCIE-SW, I can see the FPGA return correct vendor-device during enumeration, but PCIE-SW cannot send the value back to host CPU due to incorrect requester id.
The request id is 3 1 0 in the issued setup, maybe should be 0 0 0 which is in my worked  setup

Below is the log of pci enumeration,  booting, dts.
Can anyone give some guide on how to debug it.

PCI enumeration.
05:0.0 should be the FPGA, but return 0xFFFFFFFF.
[  443.475460] scanning fpga
[  443.475460]
[  443.512829] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 5, devfn 0, where 0, size 4 value 0xffffffff
[  443.512860] pci_bus_read_dev_vendor_id bus 5 devfn 0 val 0xffffffff

________________________________________

[  443.472498] pci_bus 0000:00: scanning bus
[  443.472529] pci 0000:00:01.0: scanning [bus 01-01] behind bridge, pass 0
[  443.472541] pci 0000:00:02.0: scanning [bus 02-02] behind bridge, pass 0
[  443.472551] pci 0000:00:03.0: scanning [bus 03-11] behind bridge, pass 0
[  443.472560] pci 0000:00:04.0: scanning [bus 12-12] behind bridge, pass 0
[  443.472568] pci 0000:00:07.0: scanning [bus 13-13] behind bridge, pass 0
[  443.472577] pci 0000:00:08.0: scanning [bus 14-14] behind bridge, pass 0
[  443.472586] pci 0000:00:09.0: scanning [bus 15-15] behind bridge, pass 0
[  443.472595] pci 0000:00:0a.0: scanning [bus 16-16] behind bridge, pass 0
[  443.472603] pci 0000:00:01.0: scanning [bus 00-00] behind bridge, pass 1
[  443.472610] pci_bus 0000:01: scanning bus
[  443.472617] pci_bus 0000:01: bus scan returning with max=01
[  443.472625] pci_bus 0000:01: busn_res: [bus 01] end is updated to 01
[  443.472634] pci 0000:00:02.0: scanning [bus 00-00] behind bridge, pass 1
[  443.472641] pci_bus 0000:02: scanning bus
[  443.472647] pci_bus 0000:02: bus scan returning with max=02
[  443.472653] pci_bus 0000:02: busn_res: [bus 02] end is updated to 02
[  443.472661] pci 0000:00:03.0: scanning [bus 00-00] behind bridge, pass 1
[  443.472667] pci_bus 0000:03: scanning bus
[  443.472690] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 3, devfn 0, where 24, size 4 value 0x110403
[  443.472696] pci 0000:03:00.0: scanning [bus 04-11] behind bridge, pass 0
[  443.472713] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 3, devfn 0, where 62, size 2 value 0x1
[  443.472719] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 62, size 2 value 0x1
[  443.472725] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 24, size 4 value 0x0
[  443.472731] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 62, size 2 value 0x1
[  443.472822] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 3, devfn 0, where 24, size 4 value 0x0
[  443.472827] pci 0000:03:00.0: scanning [bus 00-00] behind bridge, pass 1
[  443.472844] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 3, devfn 0, where 62, size 2 value 0x1
[  443.472850] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 62, size 2 value 0x1
[  443.472856] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 6, size 2 value 0xffff
[  443.472863] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 24, size 4 value 0x110403
[  443.472868] pci_bus 0000:04: scanning bus
[  443.472970] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 104, where 0, size 4 value 0xffffffff
[  443.472988] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 112, where 0, size 4 value 0xffffffff
[  443.473005] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 120, where 0, size 4 value 0xffffffff
[  443.473023] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 128, where 0, size 4 value 0xffffffff
[  443.473040] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 136, where 0, size 4 value 0xffffffff
[  443.473057] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 144, where 0, size 4 value 0xffffffff
[  443.473075] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 152, where 0, size 4 value 0xffffffff
[  443.473092] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 160, where 0, size 4 value 0xffffffff
[  443.473109] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 168, where 0, size 4 value 0xffffffff
[  443.473127] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 176, where 0, size 4 value 0xffffffff
[  443.473144] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 184, where 0, size 4 value 0xffffffff
[  443.473161] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 192, where 0, size 4 value 0xffffffff
[  443.473179] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 200, where 0, size 4 value 0xffffffff
[  443.473196] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 208, where 0, size 4 value 0xffffffff
[  443.473213] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 216, where 0, size 4 value 0xffffffff
[  443.473231] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 224, where 0, size 4 value 0xffffffff
[  443.473248] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 232, where 0, size 4 value 0xffffffff
[  443.473265] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 240, where 0, size 4 value 0xffffffff
[  443.473283] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 248, where 0, size 4 value 0xffffffff
[  443.473301] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 0, where 24, size 4 value 0x50504
[  443.473306] pci 0000:04:00.0: scanning [bus 05-05] behind bridge, pass 0
[  443.473323] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 0, where 62, size 2 value 0x1
[  443.473329] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 62, size 2 value 0x1
[  443.473335] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 24, size 4 value 0x0
[  443.473341] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 62, size 2 value 0x1
[  443.473393] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 8, where 24, size 4 value 0x60604
[  443.473398] pci 0000:04:01.0: scanning [bus 06-06] behind bridge, pass 0
[  443.473415] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 8, where 62, size 2 value 0x1
[  443.473421] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 62, size 2 value 0x1
[  443.473427] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 24, size 4 value 0x0
[  443.473433] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 62, size 2 value 0x1
[  443.473483] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 16, where 24, size 4 value 0x70704
[  443.473489] pci 0000:04:02.0: scanning [bus 07-07] behind bridge, pass 0
[  443.473506] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 16, where 62, size 2 value 0x1
[  443.473512] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 62, size 2 value 0x1
[  443.473518] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 24, size 4 value 0x0
[  443.473524] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 62, size 2 value 0x1
[  443.473574] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 24, where 24, size 4 value 0x80804
[  443.473580] pci 0000:04:03.0: scanning [bus 08-08] behind bridge, pass 0
[  443.473597] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 24, where 62, size 2 value 0x1
[  443.473603] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 62, size 2 value 0x1
[  443.473609] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 24, size 4 value 0x0
[  443.473615] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 62, size 2 value 0x1
[  443.473665] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 32, where 24, size 4 value 0x90904
[  443.473671] pci 0000:04:04.0: scanning [bus 09-09] behind bridge, pass 0
[  443.473688] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 32, where 62, size 2 value 0x1
[  443.473694] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 62, size 2 value 0x1
[  443.473700] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 24, size 4 value 0x0
[  443.473706] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 62, size 2 value 0x1
[  443.473757] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 40, where 24, size 4 value 0xa0a04
[  443.473762] pci 0000:04:05.0: scanning [bus 0a-0a] behind bridge, pass 0
[  443.473779] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 40, where 62, size 2 value 0x1
[  443.473785] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 62, size 2 value 0x1
[  443.473791] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 24, size 4 value 0x0
[  443.473797] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 62, size 2 value 0x1
[  443.473848] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 48, where 24, size 4 value 0xb0b04
[  443.473853] pci 0000:04:06.0: scanning [bus 0b-0b] behind bridge, pass 0
[  443.473870] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 48, where 62, size 2 value 0x1
[  443.473876] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 62, size 2 value 0x1
[  443.473882] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 24, size 4 value 0x0
[  443.473888] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 62, size 2 value 0x1
[  443.473939] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 56, where 24, size 4 value 0xc0c04
[  443.473945] pci 0000:04:07.0: scanning [bus 0c-0c] behind bridge, pass 0
[  443.473962] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 56, where 62, size 2 value 0x1
[  443.473968] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 62, size 2 value 0x1
[  443.473974] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 24, size 4 value 0x0
[  443.473980] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 62, size 2 value 0x1
[  443.474031] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 64, where 24, size 4 value 0xd0d04
[  443.474037] pci 0000:04:08.0: scanning [bus 0d-0d] behind bridge, pass 0
[  443.474054] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 64, where 62, size 2 value 0x1
[  443.474059] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 62, size 2 value 0x1
[  443.474066] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 24, size 4 value 0x0
[  443.474072] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 62, size 2 value 0x1
[  443.474123] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 72, where 24, size 4 value 0xe0e04
[  443.474129] pci 0000:04:09.0: scanning [bus 0e-0e] behind bridge, pass 0
[  443.474146] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 72, where 62, size 2 value 0x1
[  443.474152] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 62, size 2 value 0x1
[  443.474158] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 24, size 4 value 0x0
[  443.474164] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 62, size 2 value 0x1
[  443.474215] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 80, where 24, size 4 value 0xf0f04
[  443.474221] pci 0000:04:0a.0: scanning [bus 0f-0f] behind bridge, pass 0
[  443.474238] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 80, where 62, size 2 value 0x1
[  443.474244] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 62, size 2 value 0x1
[  443.474250] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 24, size 4 value 0x0
[  443.474256] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 62, size 2 value 0x1
[  443.475227] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 88, where 24, size 4 value 0x101004
[  443.475232] pci 0000:04:0b.0: scanning [bus 10-10] behind bridge, pass 0
[  443.475249] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 88, where 62, size 2 value 0x1
[  443.475255] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 62, size 2 value 0x1
[  443.475261] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 24, size 4 value 0x0
[  443.475267] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 62, size 2 value 0x1
[  443.475319] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 96, where 24, size 4 value 0x111104
[  443.475325] pci 0000:04:0c.0: scanning [bus 11-11] behind bridge, pass 0
[  443.475342] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 96, where 62, size 2 value 0x1
[  443.475348] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 62, size 2 value 0x1
[  443.475354] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 24, size 4 value 0x0
[  443.475360] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 62, size 2 value 0x1
[  443.475412] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 0, where 24, size 4 value 0x0
[  443.475417] pci 0000:04:00.0: scanning [bus 00-00] behind bridge, pass 1
[  443.475434] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 0, where 62, size 2 value 0x1
[  443.475440] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 62, size 2 value 0x1
[  443.475446] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 6, size 2 value 0xffff
[  443.475453] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 24, size 4 value 0x50504
[  443.475458] pci_bus 0000:05: scanning bus

[  443.475460] scanning fpga
[  443.475460]
[  443.512829] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 5, devfn 0, where 0, size 4 value 0xffffffff
[  443.512860] pci_bus_read_dev_vendor_id bus 5 devfn 0 val 0xffffffff
[  443.512860]
[  443.512873] pci_bus 0000:05: bus scan returning with max=05
[  443.512883] pci_bus 0000:05: busn_res: [bus 05] end is updated to 05
[  443.512896] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 26, size 1 value 0x5
[  443.512909] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 62, size 2 value 0x1
[  443.512973] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 8, where 24, size 4 value 0x0
[  443.512985] pci 0000:04:01.0: scanning [bus 00-00] behind bridge, pass 1
[  443.513007] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 8, where 62, size 2 value 0x1
[  443.513021] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 62, size 2 value 0x1
[  443.513034] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 6, size 2 value 0xffff
[  443.513048] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 24, size 4 value 0x60604
[  443.513058] pci_bus 0000:06: scanning bus
[  443.513109] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 6, devfn 0, where 0, size 4 value 0xffffffff
[  443.513120] pci_bus 0000:06: bus scan returning with max=06
[  443.513132] pci_bus 0000:06: busn_res: [bus 06] end is updated to 06
[  443.513146] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 26, size 1 value 0x6
[  443.513159] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 62, size 2 value 0x1
[  443.513218] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 16, where 24, size 4 value 0x0
[  443.513230] pci 0000:04:02.0: scanning [bus 00-00] behind bridge, pass 1
[  443.513252] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 16, where 62, size 2 value 0x1
[  443.513265] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 62, size 2 value 0x1
[  443.513279] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 6, size 2 value 0xffff
[  443.513292] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 24, size 4 value 0x70704
[  443.513303] pci_bus 0000:07: scanning bus
[  443.513353] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 7, devfn 0, where 0, size 4 value 0xffffffff
[  443.513364] pci_bus 0000:07: bus scan returning with max=07
[  443.513377] pci_bus 0000:07: busn_res: [bus 07] end is updated to 07
[  443.513390] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 26, size 1 value 0x7
[  443.513403] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 62, size 2 value 0x1
[  443.513462] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 24, where 24, size 4 value 0x0
[  443.513468] pci 0000:04:03.0: scanning [bus 00-00] behind bridge, pass 1
[  443.513485] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 24, where 62, size 2 value 0x1
[  443.513491] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 62, size 2 value 0x1
[  443.513497] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 6, size 2 value 0xffff
[  443.513504] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 24, size 4 value 0x80804
[  443.513508] pci_bus 0000:08: scanning bus
[  443.513571] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 8, devfn 0, where 0, size 4 value 0xffffffff
[  443.513576] pci_bus 0000:08: bus scan returning with max=08
[  443.513582] pci_bus 0000:08: busn_res: [bus 08] end is updated to 08
[  443.513588] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 26, size 1 value 0x8
[  443.513595] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 62, size 2 value 0x1
[  443.513655] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 32, where 24, size 4 value 0x0
[  443.513660] pci 0000:04:04.0: scanning [bus 00-00] behind bridge, pass 1
[  443.513677] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 32, where 62, size 2 value 0x1
[  443.513683] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 62, size 2 value 0x1
[  443.513689] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 6, size 2 value 0xffff
[  443.513695] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 24, size 4 value 0x90904
[  443.513700] pci_bus 0000:09: scanning bus
[  443.513763] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 9, devfn 0, where 0, size 4 value 0xffffffff
[  443.513768] pci_bus 0000:09: bus scan returning with max=09
[  443.513774] pci_bus 0000:09: busn_res: [bus 09] end is updated to 09
[  443.513780] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 26, size 1 value 0x9
[  443.513787] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 62, size 2 value 0x1
[  443.513847] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 40, where 24, size 4 value 0x0
[  443.513852] pci 0000:04:05.0: scanning [bus 00-00] behind bridge, pass 1
[  443.513869] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 40, where 62, size 2 value 0x1
[  443.513875] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 62, size 2 value 0x1
[  443.513881] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 6, size 2 value 0xffff
[  443.513887] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 24, size 4 value 0xa0a04
[  443.513892] pci_bus 0000:0a: scanning bus
[  443.513955] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 10, devfn 0, where 0, size 4 value 0xffffffff
[  443.513961] pci_bus 0000:0a: bus scan returning with max=0a
[  443.513967] pci_bus 0000:0a: busn_res: [bus 0a] end is updated to 0a
[  443.513972] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 26, size 1 value 0xa
[  443.513979] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 62, size 2 value 0x1
[  443.514039] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 48, where 24, size 4 value 0x0
[  443.514045] pci 0000:04:06.0: scanning [bus 00-00] behind bridge, pass 1
[  443.514062] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 48, where 62, size 2 value 0x1
[  443.514068] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 62, size 2 value 0x1
[  443.514074] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 6, size 2 value 0xffff
[  443.514081] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 24, size 4 value 0xb0b04
[  443.514085] pci_bus 0000:0b: scanning bus
[  443.514149] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 11, devfn 0, where 0, size 4 value 0xffffffff
[  443.514154] pci_bus 0000:0b: bus scan returning with max=0b
[  443.514160] pci_bus 0000:0b: busn_res: [bus 0b] end is updated to 0b
[  443.514166] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 26, size 1 value 0xb
[  443.514173] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 62, size 2 value 0x1
[  443.514233] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 56, where 24, size 4 value 0x0
[  443.514239] pci 0000:04:07.0: scanning [bus 00-00] behind bridge, pass 1
[  443.514255] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 56, where 62, size 2 value 0x1
[  443.514261] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 62, size 2 value 0x1
[  443.514267] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 6, size 2 value 0xffff
[  443.514274] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 24, size 4 value 0xc0c04
[  443.514279] pci_bus 0000:0c: scanning bus
[  443.514343] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 12, devfn 0, where 0, size 4 value 0xffffffff
[  443.514348] pci_bus 0000:0c: bus scan returning with max=0c
[  443.514354] pci_bus 0000:0c: busn_res: [bus 0c] end is updated to 0c
[  443.514360] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 26, size 1 value 0xc
[  443.514366] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 62, size 2 value 0x1
[  443.514481] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 64, where 24, size 4 value 0x0
[  443.514487] pci 0000:04:08.0: scanning [bus 00-00] behind bridge, pass 1
[  443.514503] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 64, where 62, size 2 value 0x1
[  443.514509] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 62, size 2 value 0x1
[  443.514515] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 6, size 2 value 0xffff
[  443.514522] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 24, size 4 value 0xd0d04
[  443.514527] pci_bus 0000:0d: scanning bus
[  443.514592] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 13, devfn 0, where 0, size 4 value 0xffffffff
[  443.514598] pci_bus 0000:0d: bus scan returning with max=0d
[  443.514603] pci_bus 0000:0d: busn_res: [bus 0d] end is updated to 0d
[  443.514609] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 26, size 1 value 0xd
[  443.514616] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 62, size 2 value 0x1
[  443.514677] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 72, where 24, size 4 value 0x0
[  443.514682] pci 0000:04:09.0: scanning [bus 00-00] behind bridge, pass 1
[  443.514699] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 72, where 62, size 2 value 0x1
[  443.514705] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 62, size 2 value 0x1
[  443.514711] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 6, size 2 value 0xffff
[  443.514718] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 24, size 4 value 0xe0e04
[  443.514723] pci_bus 0000:0e: scanning bus
[  443.514787] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 14, devfn 0, where 0, size 4 value 0xffffffff
[  443.514793] pci_bus 0000:0e: bus scan returning with max=0e
[  443.514798] pci_bus 0000:0e: busn_res: [bus 0e] end is updated to 0e
[  443.514804] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 26, size 1 value 0xe
[  443.514811] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 62, size 2 value 0x1
[  443.514872] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 80, where 24, size 4 value 0x0
[  443.514877] pci 0000:04:0a.0: scanning [bus 00-00] behind bridge, pass 1
[  443.514894] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 80, where 62, size 2 value 0x1
[  443.514900] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 62, size 2 value 0x1
[  443.514906] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 6, size 2 value 0xffff
[  443.514913] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 24, size 4 value 0xf0f04
[  443.514917] pci_bus 0000:0f: scanning bus
[  443.514982] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 15, devfn 0, where 0, size 4 value 0xffffffff
[  443.514988] pci_bus 0000:0f: bus scan returning with max=0f
[  443.514994] pci_bus 0000:0f: busn_res: [bus 0f] end is updated to 0f
[  443.514999] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 26, size 1 value 0xf
[  443.515007] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 62, size 2 value 0x1
[  443.515067] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 88, where 24, size 4 value 0x0
[  443.515073] pci 0000:04:0b.0: scanning [bus 00-00] behind bridge, pass 1
[  443.515090] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 88, where 62, size 2 value 0x1
[  443.515096] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 62, size 2 value 0x1
[  443.515102] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 6, size 2 value 0xffff
[  443.515109] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 24, size 4 value 0x101004
[  443.515114] pci_bus 0000:10: scanning bus
[  443.515179] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 16, devfn 0, where 0, size 4 value 0xffffffff
[  443.515185] pci_bus 0000:10: bus scan returning with max=10
[  443.515190] pci_bus 0000:10: busn_res: [bus 10] end is updated to 10
[  443.515196] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 26, size 1 value 0x10
[  443.515203] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 62, size 2 value 0x1
[  443.515264] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 96, where 24, size 4 value 0x0
[  443.515270] pci 0000:04:0c.0: scanning [bus 00-00] behind bridge, pass 1
[  443.515287] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 96, where 62, size 2 value 0x1
[  443.515292] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 62, size 2 value 0x1
[  443.515299] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 6, size 2 value 0xffff
[  443.515306] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 24, size 4 value 0x111104
[  443.515310] pci_bus 0000:11: scanning bus
[  443.515376] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 17, devfn 0, where 0, size 4 value 0xffffffff
[  443.515382] pci_bus 0000:11: bus scan returning with max=11
[  443.515388] pci_bus 0000:11: busn_res: [bus 11] end is updated to 11
[  443.515393] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 26, size 1 value 0x11
[  443.515401] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 62, size 2 value 0x1
[  443.515406] pci_bus 0000:04: bus scan returning with max=11
[  443.515411] pci_bus 0000:04: busn_res: [bus 04-11] end is updated to 11
[  443.515417] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 26, size 1 value 0x11
[  443.515424] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 62, size 2 value 0x1
[  443.515430] pci_bus 0000:03: bus scan returning with max=11
[  443.515435] pci_bus 0000:03: busn_res: [bus 03-11] end is updated to 11
[  443.515444] pci 0000:00:04.0: scanning [bus 00-00] behind bridge, pass 1
[  443.515451] pci_bus 0000:12: scanning bus
[  443.515458] pci_bus 0000:12: bus scan returning with max=12
[  443.515463] pci_bus 0000:12: busn_res: [bus 12] end is updated to 12
[  443.515471] pci 0000:00:07.0: scanning [bus 00-00] behind bridge, pass 1
[  443.515479] pci_bus 0000:13: scanning bus
[  443.515485] pci_bus 0000:13: bus scan returning with max=13
[  443.515491] pci_bus 0000:13: busn_res: [bus 13] end is updated to 13
[  443.515499] pci 0000:00:08.0: scanning [bus 00-00] behind bridge, pass 1
[  443.515506] pci_bus 0000:14: scanning bus
[  443.515512] pci_bus 0000:14: bus scan returning with max=14
[  443.515518] pci_bus 0000:14: busn_res: [bus 14] end is updated to 14
[  443.515526] pci 0000:00:09.0: scanning [bus 00-00] behind bridge, pass 1
[  443.515534] pci_bus 0000:15: scanning bus
[  443.515540] pci_bus 0000:15: bus scan returning with max=15
[  443.515546] pci_bus 0000:15: busn_res: [bus 15] end is updated to 15
[  443.515554] pci 0000:00:0a.0: scanning [bus 00-00] behind bridge, pass 1
[  443.515562] pci_bus 0000:16: scanning bus
[  443.515568] pci_bus 0000:16: bus scan returning with max=16
[  443.515574] pci_bus 0000:16: busn_res: [bus 16] end is updated to 16
[  443.515581] pci_bus 0000:00: bus scan returning with max=16
[  443.515607] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 0, where 28, size 2 value 0x101
[  443.515624] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 0, where 36, size 4 value 0xe1b1e1a1
[  443.515641] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 0, where 40, size 4 value 0x0
[  443.515647] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 40, size 4 value 0xffffffff
[  443.515713] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 0, where 40, size 4 value 0xffffffff
[  443.515718] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 40, size 4 value 0x0
[  443.515787] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 8, where 28, size 2 value 0x1111
[  443.515804] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 8, where 36, size 4 value 0xe1d1e1c1
[  443.515820] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 8, where 40, size 4 value 0x0
[  443.515826] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 40, size 4 value 0xffffffff
[  443.515891] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 8, where 40, size 4 value 0xffffffff
[  443.515897] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 40, size 4 value 0x0
[  443.515966] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 16, where 28, size 2 value 0x2121
[  443.515982] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 16, where 36, size 4 value 0xe1f1e1e1
[  443.516431] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 16, where 40, size 4 value 0x0
[  443.516437] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 40, size 4 value 0xffffffff
[  443.516503] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 16, where 40, size 4 value 0xffffffff
[  443.516508] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 40, size 4 value 0x0
[  443.516577] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 24, where 28, size 2 value 0x3131
[  443.516594] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 24, where 36, size 4 value 0xe211e201
[  443.516611] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 24, where 40, size 4 value 0x0
[  443.516625] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 40, size 4 value 0xffffffff
[  443.516696] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 24, where 40, size 4 value 0xffffffff
[  443.516710] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 40, size 4 value 0x0
[  443.516784] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 32, where 28, size 2 value 0x4141
[  443.516807] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 32, where 36, size 4 value 0xe231e221
[  443.516829] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 32, where 40, size 4 value 0x0
[  443.516842] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 40, size 4 value 0xffffffff
[  443.516913] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 32, where 40, size 4 value 0xffffffff
[  443.516926] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 40, size 4 value 0x0
[  443.517001] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 40, where 28, size 2 value 0x5151
[  443.517023] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 40, where 36, size 4 value 0xe251e241
[  443.517045] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 40, where 40, size 4 value 0x0
[  443.517059] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 40, size 4 value 0xffffffff
[  443.517130] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 40, where 40, size 4 value 0xffffffff
[  443.517143] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 40, size 4 value 0x0
[  443.517218] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 48, where 28, size 2 value 0x6161
[  443.517241] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 48, where 36, size 4 value 0xe271e261
[  443.517262] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 48, where 40, size 4 value 0x0
[  443.517278] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 40, size 4 value 0xffffffff
[  443.517349] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 48, where 40, size 4 value 0xffffffff
[  443.517362] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 40, size 4 value 0x0
[  443.517436] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 56, where 28, size 2 value 0x7171
[  443.517458] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 56, where 36, size 4 value 0xe291e281
[  443.517480] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 56, where 40, size 4 value 0x0
[  443.517494] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 40, size 4 value 0xffffffff
[  443.517565] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 56, where 40, size 4 value 0xffffffff
[  443.517578] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 40, size 4 value 0x0
[  443.517652] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 64, where 28, size 2 value 0x8181
[  443.517672] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 64, where 36, size 4 value 0xe2b1e2a1
[  443.517689] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 64, where 40, size 4 value 0x0
[  443.517695] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 40, size 4 value 0xffffffff
[  443.517761] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 64, where 40, size 4 value 0xffffffff
[  443.517767] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 40, size 4 value 0x0
[  443.517837] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 72, where 28, size 2 value 0x9191
[  443.517854] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 72, where 36, size 4 value 0xe2d1e2c1
[  443.517870] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 72, where 40, size 4 value 0x0
[  443.517876] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 40, size 4 value 0xffffffff
[  443.517943] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 72, where 40, size 4 value 0xffffffff
[  443.517948] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 40, size 4 value 0x0
[  443.518018] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 80, where 28, size 2 value 0xa1a1
[  443.518035] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 80, where 36, size 4 value 0xe2f1e2e1
[  443.518052] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 80, where 40, size 4 value 0x0
[  443.518058] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 40, size 4 value 0xffffffff
[  443.518125] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 80, where 40, size 4 value 0xffffffff
[  443.518130] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 40, size 4 value 0x0
[  443.518201] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 88, where 28, size 2 value 0xb1b1
[  443.518218] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 88, where 36, size 4 value 0xe311e301
[  443.518234] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 88, where 40, size 4 value 0x0
[  443.518240] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 40, size 4 value 0xffffffff
[  443.518307] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 88, where 40, size 4 value 0xffffffff
[  443.518313] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 40, size 4 value 0x0
[  443.518443] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 96, where 28, size 2 value 0xc1c1
[  443.518460] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 96, where 36, size 4 value 0xe331e321
[  443.518477] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 96, where 40, size 4 value 0x0
[  443.518483] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 40, size 4 value 0xffffffff
[  443.518550] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 96, where 40, size 4 value 0xffffffff
[  443.518556] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 40, size 4 value 0x0
[  443.518626] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 3, devfn 0, where 28, size 2 value 0xc101
[  443.518643] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 3, devfn 0, where 36, size 4 value 0xe331e1a1
[  443.518659] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 3, devfn 0, where 40, size 4 value 0x0
[  443.518665] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 40, size 4 value 0xffffffff
[  443.518746] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 3, devfn 0, where 40, size 4 value 0xffffffff
[  443.518752] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 40, size 4 value 0x0
[  443.518778] pci 0000:00:01.0: PCI bridge to [bus 01]
[  443.523781] pci 0000:00:02.0: PCI bridge to [bus 02]
[  443.528774] pci 0000:04:00.0: PCI bridge to [bus 05]
[  443.533791] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 0, where 28, size 2 value 0x101
[  443.533797] pci 0000:04:00.0:   bridge window [io  0x10000-0x10fff]
[  443.540084] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 48, size 4 value 0xffff
[  443.540090] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 28, size 2 value 0x0
[  443.540096] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 48, size 4 value 0x10001
[  443.540102] pci 0000:04:00.0:   bridge window [mem 0xe0000000-0xe01fffff]
[  443.546932] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 32, size 4 value 0xe010e000
[  443.546944] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 44, size 4 value 0x0
[  443.546951] pci 0000:04:00.0:   bridge window [mem 0xe1a00000-0xe1bfffff 64bit pref]
[  443.554725] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 36, size 4 value 0xe1b0e1a0
[  443.554731] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 40, size 4 value 0x0
[  443.554737] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 44, size 4 value 0x0
[  443.554743] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 0, where 62, size 2 value 0x1
[  443.554749] pci 0000:04:01.0: PCI bridge to [bus 06]
[  443.559741] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 8, where 28, size 2 value 0x1111
[  443.559746] pci 0000:04:01.0:   bridge window [io  0x11000-0x11fff]
[  443.566054] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 48, size 4 value 0xffff
[  443.566067] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 28, size 2 value 0x1010
[  443.566081] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 48, size 4 value 0x10001
[  443.566090] pci 0000:04:01.0:   bridge window [mem 0xe0200000-0xe03fffff]
[  443.572906] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 32, size 4 value 0xe030e020
[  443.572912] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 44, size 4 value 0x0
[  443.572919] pci 0000:04:01.0:   bridge window [mem 0xe1c00000-0xe1dfffff 64bit pref]
[  443.580684] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 36, size 4 value 0xe1d0e1c0
[  443.580690] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 40, size 4 value 0x0
[  443.580696] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 44, size 4 value 0x0
[  443.580702] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 8, where 62, size 2 value 0x1
[  443.580708] pci 0000:04:02.0: PCI bridge to [bus 07]
[  443.585719] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 16, where 28, size 2 value 0x2121
[  443.585731] pci 0000:04:02.0:   bridge window [io  0x12000-0x12fff]
[  443.592021] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 48, size 4 value 0xffff
[  443.592027] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 28, size 2 value 0x2020
[  443.592033] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 48, size 4 value 0x10001
[  443.592039] pci 0000:04:02.0:   bridge window [mem 0xe0400000-0xe05fffff]
[  443.598869] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 32, size 4 value 0xe050e040
[  443.598881] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 44, size 4 value 0x0
[  443.598887] pci 0000:04:02.0:   bridge window [mem 0xe1e00000-0xe1ffffff 64bit pref]
[  443.606661] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 36, size 4 value 0xe1f0e1e0
[  443.606668] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 40, size 4 value 0x0
[  443.606674] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 44, size 4 value 0x0
[  443.606680] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 16, where 62, size 2 value 0x1
[  443.606686] pci 0000:04:03.0: PCI bridge to [bus 08]
[  443.611677] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 24, where 28, size 2 value 0x3131
[  443.611683] pci 0000:04:03.0:   bridge window [io  0x13000-0x13fff]
[  443.617990] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 48, size 4 value 0xffff
[  443.618003] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 28, size 2 value 0x3030
[  443.618017] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 48, size 4 value 0x10001
[  443.618026] pci 0000:04:03.0:   bridge window [mem 0xe0600000-0xe07fffff]
[  443.624842] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 32, size 4 value 0xe070e060
[  443.624848] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 44, size 4 value 0x0
[  443.624854] pci 0000:04:03.0:   bridge window [mem 0xe2000000-0xe21fffff 64bit pref]
[  443.632641] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 36, size 4 value 0xe210e200
[  443.632650] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 40, size 4 value 0x0
[  443.632657] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 44, size 4 value 0x0
[  443.632663] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 24, where 62, size 2 value 0x1
[  443.632669] pci 0000:04:04.0: PCI bridge to [bus 09]
[  443.637661] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 32, where 28, size 2 value 0x4141
[  443.637667] pci 0000:04:04.0:   bridge window [io  0x14000-0x14fff]
[  443.643970] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 48, size 4 value 0xffff
[  443.643980] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 28, size 2 value 0x4040
[  443.643986] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 48, size 4 value 0x10001
[  443.643992] pci 0000:04:04.0:   bridge window [mem 0xe0800000-0xe09fffff]
[  443.650801] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 32, size 4 value 0xe090e080
[  443.650807] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 44, size 4 value 0x0
[  443.650813] pci 0000:04:04.0:   bridge window [mem 0xe2200000-0xe23fffff 64bit pref]
[  443.658599] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 36, size 4 value 0xe230e220
[  443.658608] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 40, size 4 value 0x0
[  443.658614] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 44, size 4 value 0x0
[  443.658620] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 32, where 62, size 2 value 0x1
[  443.658626] pci 0000:04:05.0: PCI bridge to [bus 0a]
[  443.663627] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 40, where 28, size 2 value 0x5151
[  443.663633] pci 0000:04:05.0:   bridge window [io  0x15000-0x15fff]
[  443.669919] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 48, size 4 value 0xffff
[  443.669926] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 28, size 2 value 0x5050
[  443.669932] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 48, size 4 value 0x10001
[  443.669938] pci 0000:04:05.0:   bridge window [mem 0xe0a00000-0xe0bfffff]
[  443.676771] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 32, size 4 value 0xe0b0e0a0
[  443.676784] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 44, size 4 value 0x0
[  443.676793] pci 0000:04:05.0:   bridge window [mem 0xe2400000-0xe25fffff 64bit pref]
[  443.684568] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 36, size 4 value 0xe250e240
[  443.684574] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 40, size 4 value 0x0
[  443.684580] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 44, size 4 value 0x0
[  443.684586] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 40, where 62, size 2 value 0x1
[  443.684592] pci 0000:04:06.0: PCI bridge to [bus 0b]
[  443.689584] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 48, where 28, size 2 value 0x6161
[  443.689590] pci 0000:04:06.0:   bridge window [io  0x16000-0x16fff]
[  443.695897] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 48, size 4 value 0xffff
[  443.695911] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 28, size 2 value 0x6060
[  443.695924] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 48, size 4 value 0x10001
[  443.695933] pci 0000:04:06.0:   bridge window [mem 0xe0c00000-0xe0dfffff]
[  443.702750] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 32, size 4 value 0xe0d0e0c0
[  443.702757] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 44, size 4 value 0x0
[  443.702763] pci 0000:04:06.0:   bridge window [mem 0xe2600000-0xe27fffff 64bit pref]
[  443.710528] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 36, size 4 value 0xe270e260
[  443.710534] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 40, size 4 value 0x0
[  443.710540] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 44, size 4 value 0x0
[  443.710546] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 48, where 62, size 2 value 0x1
[  443.710552] pci 0000:04:07.0: PCI bridge to [bus 0c]
[  443.715564] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 56, where 28, size 2 value 0x7171
[  443.715576] pci 0000:04:07.0:   bridge window [io  0x17000-0x17fff]
[  443.721865] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 48, size 4 value 0xffff
[  443.721871] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 28, size 2 value 0x7070
[  443.721877] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 48, size 4 value 0x10001
[  443.721883] pci 0000:04:07.0:   bridge window [mem 0xe0e00000-0xe0ffffff]
[  443.728712] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 32, size 4 value 0xe0f0e0e0
[  443.728724] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 44, size 4 value 0x0
[  443.728730] pci 0000:04:07.0:   bridge window [mem 0xe2800000-0xe29fffff 64bit pref]
[  443.736505] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 36, size 4 value 0xe290e280
[  443.736511] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 40, size 4 value 0x0
[  443.736517] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 44, size 4 value 0x0
[  443.736523] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 56, where 62, size 2 value 0x1
[  443.736529] pci 0000:04:08.0: PCI bridge to [bus 0d]
[  443.741520] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 64, where 28, size 2 value 0x8181
[  443.741526] pci 0000:04:08.0:   bridge window [io  0x18000-0x18fff]
[  443.747833] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 48, size 4 value 0xffff
[  443.747847] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 28, size 2 value 0x8080
[  443.747860] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 48, size 4 value 0x10001
[  443.747869] pci 0000:04:08.0:   bridge window [mem 0xe1000000-0xe11fffff]
[  443.754686] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 32, size 4 value 0xe110e100
[  443.754692] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 44, size 4 value 0x0
[  443.754698] pci 0000:04:08.0:   bridge window [mem 0xe2a00000-0xe2bfffff 64bit pref]
[  443.762484] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 36, size 4 value 0xe2b0e2a0
[  443.762493] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 40, size 4 value 0x0
[  443.762499] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 44, size 4 value 0x0
[  443.762505] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 64, where 62, size 2 value 0x1
[  443.762511] pci 0000:04:09.0: PCI bridge to [bus 0e]
[  443.767504] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 72, where 28, size 2 value 0x9191
[  443.767509] pci 0000:04:09.0:   bridge window [io  0x19000-0x19fff]
[  443.773813] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 48, size 4 value 0xffff
[  443.773820] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 28, size 2 value 0x9090
[  443.773826] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 48, size 4 value 0x10001
[  443.773832] pci 0000:04:09.0:   bridge window [mem 0xe1200000-0xe13fffff]
[  443.780640] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 32, size 4 value 0xe130e120
[  443.780646] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 44, size 4 value 0x0
[  443.780651] pci 0000:04:09.0:   bridge window [mem 0xe2c00000-0xe2dfffff 64bit pref]
[  443.788438] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 36, size 4 value 0xe2d0e2c0
[  443.788447] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 40, size 4 value 0x0
[  443.788453] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 44, size 4 value 0x0
[  443.788459] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 72, where 62, size 2 value 0x1
[  443.788465] pci 0000:04:0a.0: PCI bridge to [bus 0f]
[  443.793466] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 80, where 28, size 2 value 0xa1a1
[  443.793471] pci 0000:04:0a.0:   bridge window [io  0x1a000-0x1afff]
[  443.799757] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 48, size 4 value 0xffff
[  443.799764] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 28, size 2 value 0xa0a0
[  443.799770] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 48, size 4 value 0x10001
[  443.799776] pci 0000:04:0a.0:   bridge window [mem 0xe1400000-0xe15fffff]
[  443.806605] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 32, size 4 value 0xe150e140
[  443.806618] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 44, size 4 value 0x0
[  443.806630] pci 0000:04:0a.0:   bridge window [mem 0xe2e00000-0xe2ffffff 64bit pref]
[  443.814404] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 36, size 4 value 0xe2f0e2e0
[  443.814410] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 40, size 4 value 0x0
[  443.814416] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 44, size 4 value 0x0
[  443.814422] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 80, where 62, size 2 value 0x1
[  443.814428] pci 0000:04:0b.0: PCI bridge to [bus 10]
[  443.819420] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 88, where 28, size 2 value 0xb1b1
[  443.819425] pci 0000:04:0b.0:   bridge window [io  0x1b000-0x1bfff]
[  443.825729] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 48, size 4 value 0xffff
[  443.825743] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 28, size 2 value 0xb0b0
[  443.825757] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 48, size 4 value 0x10001
[  443.825769] pci 0000:04:0b.0:   bridge window [mem 0xe1600000-0xe17fffff]
[  443.832585] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 32, size 4 value 0xe170e160
[  443.832592] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 44, size 4 value 0x0
[  443.832598] pci 0000:04:0b.0:   bridge window [mem 0xe3000000-0xe31fffff 64bit pref]
[  443.840363] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 36, size 4 value 0xe310e300
[  443.840369] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 40, size 4 value 0x0
[  443.840375] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 44, size 4 value 0x0
[  443.840381] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 88, where 62, size 2 value 0x1
[  443.840387] pci 0000:04:0c.0: PCI bridge to [bus 11]
[  443.845399] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 4, devfn 96, where 28, size 2 value 0xc1c1
[  443.845411] pci 0000:04:0c.0:   bridge window [io  0x1c000-0x1cfff]
[  443.851699] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 48, size 4 value 0xffff
[  443.851705] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 28, size 2 value 0xc0c0
[  443.851712] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 48, size 4 value 0x10001
[  443.851717] pci 0000:04:0c.0:   bridge window [mem 0xe1800000-0xe19fffff]
[  443.858547] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 32, size 4 value 0xe190e180
[  443.858559] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 44, size 4 value 0x0
[  443.858565] pci 0000:04:0c.0:   bridge window [mem 0xe3200000-0xe33fffff 64bit pref]
[  443.866339] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 36, size 4 value 0xe330e320
[  443.866345] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 40, size 4 value 0x0
[  443.866351] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 44, size 4 value 0x0
[  443.866357] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 4, devfn 96, where 62, size 2 value 0x1
[  443.866363] pci 0000:03:00.0: PCI bridge to [bus 04-11]
[  443.871617] mvebu_pcie_hw_rd_conf port_base 0xf09d6000, bus 3, devfn 0, where 28, size 2 value 0xc101
[  443.871622] pci 0000:03:00.0:   bridge window [io  0x10000-0x1cfff]
[  443.877933] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 48, size 4 value 0xffff
[  443.877946] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 28, size 2 value 0xc000
[  443.877958] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 48, size 4 value 0x10001
[  443.877964] pci 0000:03:00.0:   bridge window [mem 0xe0000000-0xe19fffff]
[  443.884782] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 32, size 4 value 0xe190e000
[  443.884789] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 44, size 4 value 0x0
[  443.884795] pci 0000:03:00.0:   bridge window [mem 0xe1a00000-0xe33fffff 64bit pref]
[  443.892581] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 36, size 4 value 0xe330e1a0
[  443.892590] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 40, size 4 value 0x0
[  443.892596] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 44, size 4 value 0x0
[  443.892602] mvebu_pcie_hw_wr_conf port_base 0xf09d6000, bus 3, devfn 0, where 62, size 2 value 0x1
[  443.892608] pci 0000:00:03.0: PCI bridge to [bus 03-11]
[  443.897850] pci 0000:00:03.0:   bridge window [io  0x10000-0x1cfff]
[  443.904154] pci 0000:00:03.0:   bridge window [mem 0xe0000000-0xe33fffff]
[  443.910964] pci 0000:00:04.0: PCI bridge to [bus 12]
[  443.915965] pci 0000:00:07.0: PCI bridge to [bus 13]
[  443.920948] pci 0000:00:08.0: PCI bridge to [bus 14]
[  443.925947] pci 0000:00:09.0: PCI bridge to [bus 15]
[  443.930930] pci 0000:00:0a.0: PCI bridge to [bus 16]
________________________________________


Bootlog:

________________________________________

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.11.3 (duantian@...gon) (gcc version 4.6.4 20120731 (prerelease) (Linaro GCC branch-4.6.4. Marvell GCC 201301-1645.aee66e26) ) #33 SMP Tue Mar 5 15:50:33 CST 2019
[    0.000000] CPU: ARMv7 Processor [562f5842] revision 2 (ARMv7), cr=12c5387d
[    0.000000] CPU: div instructions available: patching division code
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[    0.000000] OF: fdt: Machine model: Marvell Armada XP Evaluation Board
[    0.000000] Memory policy: Data cache writealloc
[    0.000000] percpu: Embedded 15 pages/cpu @eefae000 s31232 r8192 d22016 u61440
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 522752
[    0.000000] Kernel command line: console=ttyS0,115200 mtdparts=armada-nand:6m(boot),4m(devicetree),150m(rootfs),-(remain) root=/dev/mtdblock2 rw rootfstype=jffs2 ip=10.188.116.200:10.188.116.120:::RD_AXP_SHERWOOD:eth0:none
[    0.000000] log_buf_len individual max cpu contribution: 131072 bytes
[    0.000000] log_buf_len total cpu_extra contributions: 393216 bytes
[    0.000000] log_buf_len min size: 131072 bytes
[    0.000000] log_buf_len: 524288 bytes
[    0.000000] early log buf free: 129384(98%)
[    0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[    0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[    0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[    0.000000] Memory: 2068208K/2097152K available (7168K kernel code, 362K rwdata, 1716K rodata, 1024K init, 289K bss, 28944K reserved, 0K cma-reserved, 1310720K highmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
[    0.000000]     vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xf0000000   ( 768 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   (  14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc0800000   (8160 kB)
[    0.000000]       .init : 0xc0a00000 - 0xc0b00000   (1024 kB)
[    0.000000]       .data : 0xc0b00000 - 0xc0b5a9d0   ( 363 kB)
[    0.000000]        .bss : 0xc0b5a9d0 - 0xc0ba3120   ( 290 kB)
[    0.000000] Hierarchical RCU implementation.
[    0.000000]  RCU debugfs-based tracing is enabled.
[    0.000000] NR_IRQS:16 nr_irqs:16 16
[    0.000000] mvebu_mbus: [Firmware Warn]: deprecated mbus-mvebu Device Tree, suspend/resume will not work
[    0.000000] Aurora cache controller enabled, 32 ways, 2048 kB
[    0.000000] Aurora: CACHE_ID 0x00000100, AUX_CTRL 0x1a69ef12
[    0.000000] of_cpu_clk_setup: pmu-dfs base register not set, dynamic frequency scaling not available
[    0.000000] Switching to timer-based delay loop, resolution 40ns
[    0.000005] sched_clock: 32 bits at 25MHz, resolution 40ns, wraps every 85899345900ns
[    0.000015] clocksource: armada_370_xp_clocksource: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 76450417870 ns
[    0.000317] Console: colour dummy device 80x30
[    0.000334] Calibrating delay loop (skipped), value calculated using timer frequency.. 50.00 BogoMIPS (lpj=250000)
[    0.000345] pid_max: default: 32768 minimum: 301
[    0.000429] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[    0.000437] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[    0.000692] CPU: Testing write buffer coherency: ok
[    0.000837] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.001124] Setting up static identity map for 0x100000 - 0x100058
[    0.001348] mvebu-soc-id: MVEBU SoC ID=0x7846, Rev=0x2
[    0.001428] mvebu-pmsu: Initializing Power Management Service Unit
[    0.003261] smp: Bringing up secondary CPUs ...
[    0.003491] Booting CPU 1
[    1.040052] CPU1: failed to come online
[    1.040313] Booting CPU 2
[    1.042639] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[    1.042923] Booting CPU 3
[    1.045251] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[    1.045304] smp: Brought up 1 node, 3 CPUs
[    1.045313] SMP: Total of 3 processors activated (150.00 BogoMIPS).
[    1.045318] CPU: All CPU(s) started in SVC mode.
[    1.045832] devtmpfs: initialized
[    1.048251] VFP support v0.3: implementor 56 architecture 2 part 20 variant 9 rev 6
[    1.048397] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    1.048410] futex hash table entries: 1024 (order: 4, 65536 bytes)
[    1.048468] xor: measuring software checksum speed
[    1.140045]    arm4regs  :  1287.200 MB/sec
[    1.240046]    8regs     :   954.400 MB/sec
[    1.340044]    32regs    :  1184.400 MB/sec
[    1.340050] xor: using function: arm4regs (1287.200 MB/sec)
[    1.340060] pinctrl core: initialized pinctrl subsystem
[    1.340398] NET: Registered protocol family 16
[    1.340635] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    1.341477] hw-breakpoint: Debug register access (0xee003e17) caused undefined instruction on CPU 0
[    1.341485] hw-breakpoint: CPU 0 failed to disable vector catch
[    1.341510] hw-breakpoint: Debug register access (0xee003e17) caused undefined instruction on CPU 2
[    1.341538] hw-breakpoint: Debug register access (0xee003e17) caused undefined instruction on CPU 3
[    1.347194] sram soc:sa-sram0: found no memory resource
[    1.347211] sram: probe of soc:sa-sram0 failed with error -22
[    1.520330] raid6: int32x1  gen()   117 MB/s
[    1.690156] raid6: int32x1  xor()   176 MB/s
[    1.860350] raid6: int32x2  gen()   191 MB/s
[    2.030068] raid6: int32x2  xor()   180 MB/s
[    2.200060] raid6: int32x4  gen()   207 MB/s
[    2.370057] raid6: int32x4  xor()   161 MB/s
[    2.540233] raid6: int32x8  gen()   254 MB/s
[    2.710051] raid6: int32x8  xor()   167 MB/s
[    2.710058] raid6: using algorithm int32x8 gen() 254 MB/s
[    2.710062] raid6: .... xor() 167 MB/s, rmw enabled
[    2.710067] raid6: using intx1 recovery algorithm
[    2.710278] vgaarb: loaded
[    2.710472] SCSI subsystem initialized
[    2.710817] usbcore: registered new interface driver usbfs
[    2.710867] usbcore: registered new interface driver hub
[    2.710940] usbcore: registered new device driver usb
[    2.711127] pps_core: LinuxPPS API ver. 1 registered
[    2.711134] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@...ux.it>
[    2.711150] PTP clock support registered
[    2.711800] Bluetooth: Core ver 2.22
[    2.711835] NET: Registered protocol family 31
[    2.711841] Bluetooth: HCI device and connection manager initialized
[    2.711850] Bluetooth: HCI socket layer initialized
[    2.711858] Bluetooth: L2CAP socket layer initialized
[    2.711887] Bluetooth: SCO socket layer initialized
[    2.712333] clocksource: Switched to clocksource armada_370_xp_clocksource
[    2.719079] NET: Registered protocol family 2
[    2.719399] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
[    2.719448] TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
[    2.719511] TCP: Hash tables configured (established 8192 bind 8192)
[    2.719574] UDP hash table entries: 512 (order: 2, 16384 bytes)
[    2.719597] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
[    2.719702] NET: Registered protocol family 1
[    2.719918] RPC: Registered named UNIX socket transport module.
[    2.719925] RPC: Registered udp transport module.
[    2.719930] RPC: Registered tcp transport module.
[    2.719935] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    2.720271] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
[    2.721478] workingset: timestamp_bits=30 max_order=19 bucket_order=0
[    2.722002] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[    2.725339] async_tx: api initialized (async)
[    2.725377] bounce: pool size: 64 pages
[    2.725411] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
[    2.725418] io scheduler noop registered
[    2.725424] io scheduler deadline registered
[    2.725452] io scheduler cfq registered (default)
[    2.725458] io scheduler mq-deadline registered
[    2.726245] armada-xp-pinctrl f1018000.pin-ctrl: registered pinctrl driver
[    2.727831] mvebu-pcie soc:pcie-controller: PCI host bridge to bus 0000:00
[    2.727844] pci_bus 0000:00: root bus resource [io  0x1000-0xfffff]
[    2.727852] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff]
[    2.727861] pci_bus 0000:00: root bus resource [bus 00-ff]
[    2.729286] PCI: bus0: Fast back to back transfers disabled
[    2.729298] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.729310] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.729320] pci 0000:00:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.729330] pci 0000:00:04.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.729340] pci 0000:00:07.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.729350] pci 0000:00:08.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.729360] pci 0000:00:09.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.729370] pci 0000:00:0a.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.729452] PCI: bus1: Fast back to back transfers enabled
[    2.729545] PCI: bus2: Fast back to back transfers enabled
[    2.731367] PCI: bus3: Fast back to back transfers disabled
[    2.731407] pci 0000:03:00.0: Primary bus is hard wired to 0
[    2.731415] pci 0000:03:00.0: bridge configuration invalid ([bus 01-0e]), reconfiguring
[    2.786019] PCI: bus4: Fast back to back transfers disabled
[    2.786062] pci 0000:04:00.0: bridge configuration invalid ([bus 02-02]), reconfiguring
[    2.786139] pci 0000:04:01.0: bridge configuration invalid ([bus 03-03]), reconfiguring
[    2.786215] pci 0000:04:02.0: bridge configuration invalid ([bus 04-04]), reconfiguring
[    2.787488] pci 0000:04:03.0: bridge configuration invalid ([bus 05-05]), reconfiguring
[    2.787563] pci 0000:04:04.0: bridge configuration invalid ([bus 06-06]), reconfiguring
[    2.787638] pci 0000:04:05.0: bridge configuration invalid ([bus 07-07]), reconfiguring
[    2.787713] pci 0000:04:06.0: bridge configuration invalid ([bus 08-08]), reconfiguring
[    2.787788] pci 0000:04:07.0: bridge configuration invalid ([bus 09-09]), reconfiguring
[    2.787864] pci 0000:04:08.0: bridge configuration invalid ([bus 0a-0a]), reconfiguring
[    2.787941] pci 0000:04:09.0: bridge configuration invalid ([bus 0b-0b]), reconfiguring
[    2.788017] pci 0000:04:0a.0: bridge configuration invalid ([bus 0c-0c]), reconfiguring
[    2.788093] pci 0000:04:0b.0: bridge configuration invalid ([bus 0d-0d]), reconfiguring
[    2.788169] pci 0000:04:0c.0: bridge configuration invalid ([bus 0e-0e]), reconfiguring
[    2.827353] PCI: bus5: Fast back to back transfers enabled
[    2.827859] PCI: bus6: Fast back to back transfers enabled
[    2.828355] PCI: bus7: Fast back to back transfers enabled
[    2.829099] PCI: bus8: Fast back to back transfers enabled
[    2.829602] PCI: bus9: Fast back to back transfers enabled
[    2.831049] PCI: bus10: Fast back to back transfers enabled
[    2.831553] PCI: bus11: Fast back to back transfers enabled
[    2.833017] PCI: bus12: Fast back to back transfers enabled
[    2.833521] PCI: bus13: Fast back to back transfers enabled
[    2.834945] PCI: bus14: Fast back to back transfers enabled
[    2.835455] PCI: bus15: Fast back to back transfers enabled
[    2.836897] PCI: bus16: Fast back to back transfers enabled
[    2.837406] PCI: bus17: Fast back to back transfers enabled
[    2.837555] PCI: bus18: Fast back to back transfers enabled
[    2.837661] PCI: bus19: Fast back to back transfers enabled
[    2.837767] PCI: bus20: Fast back to back transfers enabled
[    2.837882] PCI: bus21: Fast back to back transfers enabled
[    2.837993] PCI: bus22: Fast back to back transfers enabled
[    2.841805] pci 0000:00:03.0: BAR 8: assigned [mem 0xe0000000-0xe33fffff]
[    2.841815] pci 0000:00:03.0: BAR 7: assigned [io  0x10000-0x1cfff]
[    2.841824] pci 0000:00:01.0: PCI bridge to [bus 01]
[    2.841836] pci 0000:00:02.0: PCI bridge to [bus 02]
[    2.841849] pci 0000:03:00.0: BAR 8: assigned [mem 0xe0000000-0xe19fffff]
[    2.841858] pci 0000:03:00.0: BAR 9: assigned [mem 0xe1a00000-0xe33fffff 64bit pref]
[    2.841866] pci 0000:03:00.0: BAR 7: assigned [io  0x10000-0x1cfff]
[    2.841894] pci 0000:04:00.0: BAR 8: assigned [mem 0xe0000000-0xe01fffff]
[    2.841903] pci 0000:04:00.0: BAR 9: assigned [mem 0xe1a00000-0xe1bfffff 64bit pref]
[    2.841912] pci 0000:04:01.0: BAR 8: assigned [mem 0xe0200000-0xe03fffff]
[    2.841921] pci 0000:04:01.0: BAR 9: assigned [mem 0xe1c00000-0xe1dfffff 64bit pref]
[    2.841929] pci 0000:04:02.0: BAR 8: assigned [mem 0xe0400000-0xe05fffff]
[    2.841938] pci 0000:04:02.0: BAR 9: assigned [mem 0xe1e00000-0xe1ffffff 64bit pref]
[    2.841947] pci 0000:04:03.0: BAR 8: assigned [mem 0xe0600000-0xe07fffff]
[    2.841955] pci 0000:04:03.0: BAR 9: assigned [mem 0xe2000000-0xe21fffff 64bit pref]
[    2.841964] pci 0000:04:04.0: BAR 8: assigned [mem 0xe0800000-0xe09fffff]
[    2.841973] pci 0000:04:04.0: BAR 9: assigned [mem 0xe2200000-0xe23fffff 64bit pref]
[    2.841981] pci 0000:04:05.0: BAR 8: assigned [mem 0xe0a00000-0xe0bfffff]
[    2.841990] pci 0000:04:05.0: BAR 9: assigned [mem 0xe2400000-0xe25fffff 64bit pref]
[    2.841999] pci 0000:04:06.0: BAR 8: assigned [mem 0xe0c00000-0xe0dfffff]
[    2.842008] pci 0000:04:06.0: BAR 9: assigned [mem 0xe2600000-0xe27fffff 64bit pref]
[    2.842016] pci 0000:04:07.0: BAR 8: assigned [mem 0xe0e00000-0xe0ffffff]
[    2.842025] pci 0000:04:07.0: BAR 9: assigned [mem 0xe2800000-0xe29fffff 64bit pref]
[    2.842034] pci 0000:04:08.0: BAR 8: assigned [mem 0xe1000000-0xe11fffff]
[    2.842043] pci 0000:04:08.0: BAR 9: assigned [mem 0xe2a00000-0xe2bfffff 64bit pref]
[    2.842052] pci 0000:04:09.0: BAR 8: assigned [mem 0xe1200000-0xe13fffff]
[    2.842061] pci 0000:04:09.0: BAR 9: assigned [mem 0xe2c00000-0xe2dfffff 64bit pref]
[    2.842070] pci 0000:04:0a.0: BAR 8: assigned [mem 0xe1400000-0xe15fffff]
[    2.842079] pci 0000:04:0a.0: BAR 9: assigned [mem 0xe2e00000-0xe2ffffff 64bit pref]
[    2.842088] pci 0000:04:0b.0: BAR 8: assigned [mem 0xe1600000-0xe17fffff]
[    2.842097] pci 0000:04:0b.0: BAR 9: assigned [mem 0xe3000000-0xe31fffff 64bit pref]
[    2.842106] pci 0000:04:0c.0: BAR 8: assigned [mem 0xe1800000-0xe19fffff]
[    2.842116] pci 0000:04:0c.0: BAR 9: assigned [mem 0xe3200000-0xe33fffff 64bit pref]
[    2.842124] pci 0000:04:00.0: BAR 7: assigned [io  0x10000-0x10fff]
[    2.842132] pci 0000:04:01.0: BAR 7: assigned [io  0x11000-0x11fff]
[    2.842140] pci 0000:04:02.0: BAR 7: assigned [io  0x12000-0x12fff]
[    2.842149] pci 0000:04:03.0: BAR 7: assigned [io  0x13000-0x13fff]
[    2.842157] pci 0000:04:04.0: BAR 7: assigned [io  0x14000-0x14fff]
[    2.842165] pci 0000:04:05.0: BAR 7: assigned [io  0x15000-0x15fff]
[    2.842174] pci 0000:04:06.0: BAR 7: assigned [io  0x16000-0x16fff]
[    2.842183] pci 0000:04:07.0: BAR 7: assigned [io  0x17000-0x17fff]
[    2.842191] pci 0000:04:08.0: BAR 7: assigned [io  0x18000-0x18fff]
[    2.842200] pci 0000:04:09.0: BAR 7: assigned [io  0x19000-0x19fff]
[    2.842208] pci 0000:04:0a.0: BAR 7: assigned [io  0x1a000-0x1afff]
[    2.842217] pci 0000:04:0b.0: BAR 7: assigned [io  0x1b000-0x1bfff]
[    2.842226] pci 0000:04:0c.0: BAR 7: assigned [io  0x1c000-0x1cfff]
[    2.842238] pci 0000:04:00.0: PCI bridge to [bus 05]
[    2.842259] pci 0000:04:00.0:   bridge window [io  0x10000-0x10fff]
[    2.842268] pci 0000:04:00.0:   bridge window [mem 0xe0000000-0xe01fffff]
[    2.842285] pci 0000:04:00.0:   bridge window [mem 0xe1a00000-0xe1bfffff 64bit pref]
[    2.842486] pci 0000:04:01.0: PCI bridge to [bus 06]
[    2.842654] pci 0000:04:01.0:   bridge window [io  0x11000-0x11fff]
[    2.842664] pci 0000:04:01.0:   bridge window [mem 0xe0200000-0xe03fffff]
[    2.842680] pci 0000:04:01.0:   bridge window [mem 0xe1c00000-0xe1dfffff 64bit pref]
[    2.842809] pci 0000:04:02.0: PCI bridge to [bus 07]
[    2.842978] pci 0000:04:02.0:   bridge window [io  0x12000-0x12fff]
[    2.842988] pci 0000:04:02.0:   bridge window [mem 0xe0400000-0xe05fffff]
[    2.843004] pci 0000:04:02.0:   bridge window [mem 0xe1e00000-0xe1ffffff 64bit pref]
[    2.843133] pci 0000:04:03.0: PCI bridge to [bus 08]
[    2.843303] pci 0000:04:03.0:   bridge window [io  0x13000-0x13fff]
[    2.843312] pci 0000:04:03.0:   bridge window [mem 0xe0600000-0xe07fffff]
[    2.843329] pci 0000:04:03.0:   bridge window [mem 0xe2000000-0xe21fffff 64bit pref]
[    2.843459] pci 0000:04:04.0: PCI bridge to [bus 09]
[    2.843630] pci 0000:04:04.0:   bridge window [io  0x14000-0x14fff]
[    2.843639] pci 0000:04:04.0:   bridge window [mem 0xe0800000-0xe09fffff]
[    2.843656] pci 0000:04:04.0:   bridge window [mem 0xe2200000-0xe23fffff 64bit pref]
[    2.843786] pci 0000:04:05.0: PCI bridge to [bus 0a]
[    2.843957] pci 0000:04:05.0:   bridge window [io  0x15000-0x15fff]
[    2.843966] pci 0000:04:05.0:   bridge window [mem 0xe0a00000-0xe0bfffff]
[    2.843983] pci 0000:04:05.0:   bridge window [mem 0xe2400000-0xe25fffff 64bit pref]
[    2.844113] pci 0000:04:06.0: PCI bridge to [bus 0b]
[    2.844285] pci 0000:04:06.0:   bridge window [io  0x16000-0x16fff]
[    2.844295] pci 0000:04:06.0:   bridge window [mem 0xe0c00000-0xe0dfffff]
[    2.844366] pci 0000:04:06.0:   bridge window [mem 0xe2600000-0xe27fffff 64bit pref]
[    2.844497] pci 0000:04:07.0: PCI bridge to [bus 0c]
[    2.844667] pci 0000:04:07.0:   bridge window [io  0x17000-0x17fff]
[    2.844676] pci 0000:04:07.0:   bridge window [mem 0xe0e00000-0xe0ffffff]
[    2.844693] pci 0000:04:07.0:   bridge window [mem 0xe2800000-0xe29fffff 64bit pref]
[    2.844823] pci 0000:04:08.0: PCI bridge to [bus 0d]
[    2.844994] pci 0000:04:08.0:   bridge window [io  0x18000-0x18fff]
[    2.845004] pci 0000:04:08.0:   bridge window [mem 0xe1000000-0xe11fffff]
[    2.845020] pci 0000:04:08.0:   bridge window [mem 0xe2a00000-0xe2bfffff 64bit pref]
[    2.845151] pci 0000:04:09.0: PCI bridge to [bus 0e]
[    2.845323] pci 0000:04:09.0:   bridge window [io  0x19000-0x19fff]
[    2.845333] pci 0000:04:09.0:   bridge window [mem 0xe1200000-0xe13fffff]
[    2.845349] pci 0000:04:09.0:   bridge window [mem 0xe2c00000-0xe2dfffff 64bit pref]
[    2.845480] pci 0000:04:0a.0: PCI bridge to [bus 0f]
[    2.845654] pci 0000:04:0a.0:   bridge window [io  0x1a000-0x1afff]
[    2.845663] pci 0000:04:0a.0:   bridge window [mem 0xe1400000-0xe15fffff]
[    2.845679] pci 0000:04:0a.0:   bridge window [mem 0xe2e00000-0xe2ffffff 64bit pref]
[    2.845811] pci 0000:04:0b.0: PCI bridge to [bus 10]
[    2.845985] pci 0000:04:0b.0:   bridge window [io  0x1b000-0x1bfff]
[    2.845994] pci 0000:04:0b.0:   bridge window [mem 0xe1600000-0xe17fffff]
[    2.846011] pci 0000:04:0b.0:   bridge window [mem 0xe3000000-0xe31fffff 64bit pref]
[    2.846143] pci 0000:04:0c.0: PCI bridge to [bus 11]
[    2.846384] pci 0000:04:0c.0:   bridge window [io  0x1c000-0x1cfff]
[    2.846393] pci 0000:04:0c.0:   bridge window [mem 0xe1800000-0xe19fffff]
[    2.846410] pci 0000:04:0c.0:   bridge window [mem 0xe3200000-0xe33fffff 64bit pref]
[    2.846542] pci 0000:03:00.0: PCI bridge to [bus 04-11]
[    2.846722] pci 0000:03:00.0:   bridge window [io  0x10000-0x1cfff]
[    2.846731] pci 0000:03:00.0:   bridge window [mem 0xe0000000-0xe19fffff]
[    2.846746] pci 0000:03:00.0:   bridge window [mem 0xe1a00000-0xe33fffff 64bit pref]
[    2.846903] pci 0000:00:03.0: PCI bridge to [bus 03-11]
[    2.846911] pci 0000:00:03.0:   bridge window [io  0x10000-0x1cfff]
[    2.846920] pci 0000:00:03.0:   bridge window [mem 0xe0000000-0xe33fffff]
[    2.846929] pci 0000:00:04.0: PCI bridge to [bus 12]
[    2.846940] pci 0000:00:07.0: PCI bridge to [bus 13]
[    2.846951] pci 0000:00:08.0: PCI bridge to [bus 14]
[    2.846961] pci 0000:00:09.0: PCI bridge to [bus 15]
[    2.846972] pci 0000:00:0a.0: PCI bridge to [bus 16]
[    2.847461] mv_xor f1060900.xor: Marvell shared XOR driver
[    2.902813] mv_xor f1060900.xor: Marvell XOR (Registers Mode): ( xor cpy sg intr )
[    2.962778] mv_xor f1060900.xor: Marvell XOR (Registers Mode): ( xor cpy sg intr )
[    2.963759] mv_xor f10f0900.xor: Marvell shared XOR driver
[    3.022779] mv_xor f10f0900.xor: Marvell XOR (Registers Mode): ( xor cpy sg intr )
[    3.082779] mv_xor f10f0900.xor: Marvell XOR (Registers Mode): ( xor cpy sg intr )
[    3.126141] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[    3.127414] console [ttyS0] disabled
[    3.147528] f1012000.serial: ttyS0 at MMIO 0xf1012000 (irq = 19, base_baud = 15625000) is a 16550A
[    5.004986] console [ttyS0] enabled
[    5.029100] f1012100.serial: ttyS1 at MMIO 0xf1012100 (irq = 20, base_baud = 15625000) is a 16550A
[    5.058754] f1012200.serial: ttyS2 at MMIO 0xf1012200 (irq = 33, base_baud = 15625000) is a 16550A
[    5.088321] f1012300.serial: ttyS3 at MMIO 0xf1012300 (irq = 34, base_baud = 15625000) is a 16550A
[    5.099727] brd: module loaded
[    5.107964] loop: module loaded
[    5.111758] sata_mv f10a0000.sata: slots 32 ports 2
[    5.117567] scsi host0: sata_mv
[    5.120982] scsi host1: sata_mv
[    5.124313] ata1: SATA max UDMA/133 irq 30
[    5.128421] ata2: SATA max UDMA/133 irq 30
[    5.133082] armada-nand f10d0000.nand-flash: Initialize HAL based NFC in 8bit mode with DMA Disabled using BCH 4bit ECC
[    5.148002] NAND device: Manufacturer ID: 0xec, Chip ID: 0xd7 (Samsung NAND 4GiB 3,3V 8-bit), 4096MiB, page size: 4096, OOB size: 128
[    5.160463] Bad block table found at page 1048448, version 0x01
[    5.167145] Bad block table found at page 1048320, version 0x01
[    5.173529] 4 cmdlinepart partitions found on MTD device armada-nand
[    5.179899] Creating 4 MTD partitions on "armada-nand":
[    5.185153] 0x000000000000-0x000000600000 : "boot"
[    5.190686] 0x000000600000-0x000000a00000 : "devicetree"
[    5.196737] 0x000000a00000-0x00000a000000 : "rootfs"
[    5.202490] 0x00000a000000-0x000100000000 : "remain"
[    5.209668] m25p80 spi0.0: m25p64 (8192 Kbytes)
[    5.214981] Ethernet Channel Bonding Driver: v3.7.1 (April 27, 2011)
[    5.222993] libphy: Fixed MDIO Bus: probed
[    5.227655] libphy: orion_mdio_bus: probed
[    5.234142] mvneta f1070000.ethernet eth0: Using device tree mac address 00:50:43:1f:34:58
[    5.243566] mvneta f1074000.ethernet eth1: Using device tree mac address 00:50:43:34:58:00
[    5.252016] Intel(R) Wireless WiFi driver for Linux
[    5.256920] Copyright(c) 2003- 2015 Intel Corporation
[    5.262115] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    5.268677] ehci-pci: EHCI PCI platform driver
[    5.273191] ehci-orion: EHCI orion driver
[    5.277300] orion-ehci f1050000.usb: EHCI Host Controller
[    5.282746] orion-ehci f1050000.usb: new USB bus registered, assigned bus number 1
[    5.290400] orion-ehci f1050000.usb: irq 26, io mem 0xf1050000
[    5.332344] orion-ehci f1050000.usb: USB 2.0 started, EHCI 1.00
[    5.338873] hub 1-0:1.0: USB hub found
[    5.342684] hub 1-0:1.0: 1 port detected
[    5.346924] orion-ehci f1051000.usb: EHCI Host Controller
[    5.352371] orion-ehci f1051000.usb: new USB bus registered, assigned bus number 2
[    5.360011] orion-ehci f1051000.usb: irq 27, io mem 0xf1051000
[    5.392341] orion-ehci f1051000.usb: USB 2.0 started, EHCI 1.00
[    5.398827] hub 2-0:1.0: USB hub found
[    5.402632] hub 2-0:1.0: 1 port detected
[    5.406887] orion-ehci f1052000.usb: EHCI Host Controller
[    5.412315] orion-ehci f1052000.usb: new USB bus registered, assigned bus number 3
[    5.419980] orion-ehci f1052000.usb: irq 35, io mem 0xf1052000
[    5.452343] orion-ehci f1052000.usb: USB 2.0 started, EHCI 1.00
[    5.458861] hub 3-0:1.0: USB hub found
[    5.462666] hub 3-0:1.0: 1 port detected
[    5.463368] ata1: SATA link down (SStatus 0 SControl F300)
[    5.472751] usbcore: registered new interface driver usb-storage
[    5.479221] rtc-mv f1010300.rtc: rtc core: registered f1010300.rtc as rtc0
[    5.486523] (NULL device *): hwmon_device_register() is deprecated. Please convert the driver to use hwmon_device_register_with_info().
[    5.499183] mvebu-pmsu: [Firmware Warn]: not enabling cpufreq, deprecated armada-xp-cpu-clock binding
[    5.508624] sdhci: Secure Digital Host Controller Interface driver
[    5.514833] sdhci: Copyright(c) Pierre Ossman
[    5.572401] sdhci-pltfm: SDHCI platform and OF driver helper
[    5.578423] marvell-cesa: probe of f1090000.crypto failed with error -22
[    5.585366] usbcore: registered new interface driver usbhid
[    5.590954] usbhid: USB HID core driver
[    5.595319] of-flash f0000000.nor: do_map_probe() failed for type cfi_probe
[    5.602399] of-flash f0000000.nor: do_map_probe() failed
[    5.608057] NET: Registered protocol family 10
[    5.613124] Segment Routing with IPv6
[    5.616830] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    5.623231] NET: Registered protocol family 17
[    5.627807] Registering SWP/SWPB emulation handler
[    5.633841] Btrfs loaded, crc32c=crc32c-generic
[    5.642473] rtc-mv f1010300.rtc: setting system clock to 2000-01-01 00:00:00 UTC (946684800)
[    5.762743] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[    5.793912] ata2: SATA link down (SStatus 0 SControl F300)
[    5.822343] usb 3-1: new high-speed USB device number 2 using orion-ehci
[    6.013355] hub 3-1:1.0: USB hub found
[    6.017225] hub 3-1:1.0: 4 ports detected
[    7.842784] mvneta f1070000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off
[    7.852381] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[    7.882340] IP-Config: Guessing netmask 255.0.0.0
[    7.887056] IP-Config: Complete:
[    7.890294]      device=eth0, hwaddr=00:50:43:1f:34:58, ipaddr=10.188.116.200, mask=255.0.0.0, gw=255.255.255.255
[    7.900645]      host=RD_AXP_SHERWOOD, domain=, nis-domain=(none)
[    7.906765]      bootserver=10.188.116.120, rootserver=10.188.116.120, rootpath=
[    7.914631] md: Waiting for all devices to be available before autodetect
[    7.921438] md: If you don't use raid, use raid=noautodetect
[    7.927591] md: Autodetecting RAID arrays.
[    7.931699] md: autorun ...
[    7.934514] md: ... autorun DONE.
________________________________________

DTS:
The armada-xp-mv78460.dtsi is not modified.

#include "armada-xp-mv78460.dtsi"

/ {
    model = "Marvell Armada XP Evaluation Board";
    compatible = "marvell,axp-db", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";

    chosen {
        bootargs = "console=ttyS0,115200 earlyprintk";
        stdout-path = "serial0:115200n8";
    };

    memory {
        device_type = "memory";
        reg = <0 0x00000000 0 0x80000000>; /* 2 GB */
    };

    soc {
        ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
              MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
              MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
              MBUS_ID(0x09, 0x01) 0 0 0xf1100000 0x10000    /* CESA0: PHYS=0xf1100000
                                       size 64K */
              MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;  /* CESA1: PHYS=0xf1110000
                                       size 64K */

        devbus-bootcs {
            status = "okay";

            /* Device Bus parameters are required */

            /* Read parameters */
            devbus,bus-width    = <8>;
            devbus,turn-off-ps  = <60000>;
            devbus,badr-skew-ps = <0>;
            devbus,acc-first-ps = <124000>;
            devbus,acc-next-ps  = <248000>;
            devbus,rd-setup-ps  = <0>;
            devbus,rd-hold-ps   = <0>;

            /* Write parameters */
            devbus,sync-enable = <0>;
            devbus,wr-high-ps  = <60000>;
            devbus,wr-low-ps   = <60000>;
            devbus,ale-wr-ps   = <60000>;

           /* NOR 16 MiB */
            nor@0 {
                compatible = "cfi-flash";
                reg = <0 0x1000000>;
                bank-width = <2>;
            };
        };

        internal-regs {
            serial@...00 {
                clock-frequency = <250000000>;
                status = "okay";
            };
            serial@...00 {
                clock-frequency = <250000000>;
                status = "okay";
            };
            serial@...00 {
                clock-frequency = <250000000>;
                status = "okay";
            };
            serial@...00 {
                clock-frequency = <250000000>;
                status = "okay";
            };

            sata@...00 {
                nr-ports = <2>;
                status = "okay";
            };

            ethernet@...00 {
                status = "okay";
                phy = <&phy0>;
                phy-mode = "rgmii-id";
            };
            ethernet@...00 {
                status = "okay";
                phy = <&phy1>;
                phy-mode = "rgmii-id";
            };
            /* ethernet@...00 {
                status = "okay";
                phy = <&phy2>;
                phy-mode = "sgmii";
            };
            ethernet@...00 {
                status = "okay";
                phy = <&phy3>;
                phy-mode = "sgmii";
            }; */

            bm@...00 {
                status = "okay";
            };

            mvsdio@...00 {
                pinctrl-0 = <&sdio_pins>;
              pinctrl-names = "default";
                status = "okay";
                /* No CD or WP GPIOs */
                broken-cd;
            };

            usb@...00 {
                status = "okay";
           };

            usb@...00 {
                status = "okay";
            };

            usb@...00 {
                status = "okay";
            };

            /* 1GB Flash via NFC NAND controller */
            nfc: nand-flash@...00 {
                compatible = "marvell,armada-nand";
                #address-cells = <1>;
                #size-cells = <1>;
                clock-frequency = <250000000>;
                status = "okay";

                nfc,nfc-mode  = "normal";       /* normal or ganged */
                nfc,nfc-dma   = <0>;            /* 0 for no, 1 for dma */
                nfc,nfc-width = <8>;
                nfc,ecc-type  = <1>;            /* 4 bit */
                nfc,num-cs    = <1>;

                mtd0@...00000 {
                    label = "U-Boot";
                    reg = <0x00000000 0x00300000>;
                    read-only;
                };

                mtd1@...80000 {
                    label = "uImage";
                    reg = <0x00300000 0x00400000>;
                    read-only;
                };

                mtd2@...40000 {
                    label = "Root";
                    reg = <0x00700000 0x3f900000>;
                };
            };


            crypto@...00 {
                status = "okay";
            };
        };
    };
};

&pciec {
    status = "okay";

    /*
     * All 6 slots are physically present as
     * standard PCIe slots on the board.
     */
    pcie@1,0 {
        /* Port 0, Lane 0 */
        status = "okay";
    };
    pcie@2,0 {
        /* Port 0, Lane 1 */
        status = "okay";
    };
    pcie@3,0 {
        /* Port 0, Lane 2 */
        status = "okay";
    };
    pcie@4,0 {
        /* Port 0, Lane 3 */
        status = "okay";
    };
    pcie@9,0 {
        /* Port 2, Lane 0 */
        status = "okay";
    };
    pcie@10,0 {
        /* Port 3, Lane 0 */
        status = "okay";
    };
};

&mdio {
    phy0: ethernet-phy@0 {
        reg = <0>;
    };

    phy1: ethernet-phy@1 {
        reg = <1>;
    };

    /* sher: commented it */

    /* phy2: ethernet-phy@2 {
        reg = <25>;
    };

    phy3: ethernet-phy@3 {
        reg = <27>;
    }; */
};

&spi0 {
    status = "okay";

    spi-flash@0 {
        #address-cells = <1>;
        #size-cells = <1>;
        compatible = "m25p64";
        reg = <0>; /* Chip select 0 */
        spi-max-frequency = <20000000>;
    };
};
________________________________________


Thanks, tian