linux-kernel - Re: [PATCH v3 5/8] KVM:VMX: Pass through host CET related MSRs to Guest.

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Message-ID: <20190305032127.GA23534@linux.intel.com>
Date:   Mon, 4 Mar 2019 19:21:27 -0800
From:   Sean Christopherson <sean.j.christopherson@...el.com>
To:     Yang Weijiang <weijiang.yang@...el.com>
Cc:     pbonzini@...hat.com, rkrcmar@...hat.com, jmattson@...gle.com,
        linux-kernel@...r.kernel.org, kvm@...r.kernel.org, mst@...hat.com,
        yu-cheng.yu@...el.com, Zhang Yi Z <yi.z.zhang@...ux.intel.com>
Subject: Re: [PATCH v3 5/8] KVM:VMX: Pass through host CET related MSRs to
 Guest.

On Mon, Mar 04, 2019 at 06:07:14PM +0800, Yang Weijiang wrote:
> On Mon, Mar 04, 2019 at 10:53:27AM -0800, Sean Christopherson wrote:
> > On Mon, Feb 25, 2019 at 09:27:13PM +0800, Yang Weijiang wrote:
> > > The CET runtime settings, i.e., CET state control bits(IA32_U_CET/
> > > IA32_S_CET), CET SSP(IA32_PL3_SSP/IA32_PL0_SSP) and SSP table address
> > > (IA32_INTERRUPT_SSP_TABLE_ADDR) are task/thread specific, therefore,
> > > OS needs to save/restore the states properly during context switch,
> > > e.g., task/thread switching, interrupt/exception handling, it uses
> > > xsaves/xrstors to achieve that.
> > > 
> > > The difference between VMCS CET area fields and xsave CET area, is that
> > > the former is for state retention during Guest/Host context
> > > switch while the latter is for state retention during OS execution.
> > > 
> > > Linux currently doesn't support CPL1 and CPL2, so SSPs for these level
> > > are skipped here.
> > 
> > But don't we want to allow a guest to access the MSRs regardless of
> > the host kernel's behavior?
> >
> Do you see any necessity of exposing the access to guest?

No, but isn't exposing them to the guest effectively free since XSAVES
and XRSTORS will always save/restore them along with SSP0 and SSP3?