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Message-ID: <1551980211-9709-2-git-send-email-fabien.dessenne@st.com>
Date: Thu, 7 Mar 2019 18:36:50 +0100
From: Fabien Dessenne <fabien.dessenne@...com>
To: Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...com>,
<linux-kernel@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>
CC: Fabien Dessenne <fabien.dessenne@...com>,
Benjamin Gaignard <benjamin.gaignard@...com>
Subject: [PATCH v2 1/2] irqchip: stm32: don't clear rising/falling config registers at init
falling and rising configuration and status registers are not banked.
As they are shared with M4 co-processor, they should not be cleared
at probe time, else M4 co-processor configuration will be lost.
Signed-off-by: Loic Pallardy <loic.pallardy@...com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@...com>
---
drivers/irqchip/irq-stm32-exti.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index 6edfd4b..dab37fb 100644
--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c
@@ -735,11 +735,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
*/
writel_relaxed(0, base + stm32_bank->imr_ofst);
writel_relaxed(0, base + stm32_bank->emr_ofst);
- writel_relaxed(0, base + stm32_bank->rtsr_ofst);
- writel_relaxed(0, base + stm32_bank->ftsr_ofst);
- writel_relaxed(~0UL, base + stm32_bank->rpr_ofst);
- if (stm32_bank->fpr_ofst != UNDEF_REG)
- writel_relaxed(~0UL, base + stm32_bank->fpr_ofst);
pr_info("%pOF: bank%d\n", h_data->node, bank_idx);
--
2.7.4
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