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Message-ID: <CAMuHMdVjgWNw4fnzJV=Qxs6zyNiBPubJUL-4WDOy26N4TkQ4gQ@mail.gmail.com>
Date:   Fri, 8 Mar 2019 10:14:51 +0100
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
Cc:     Mason Yang <masonccyang@...c.com.tw>,
        Mark Brown <broonie@...nel.org>,
        Marek Vasut <marek.vasut@...il.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-spi <linux-spi@...r.kernel.org>,
        Boris Brezillon <bbrezillon@...nel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        juliensu@...c.com.tw, Simon Horman <horms@...ge.net.au>,
        zhengxunli@...c.com.tw
Subject: Re: [PATCH v8 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver

Hi Sergei,

On Thu, Mar 7, 2019 at 6:50 PM Sergei Shtylyov
<sergei.shtylyov@...entembedded.com> wrote:
> On 01/28/2019 09:49 AM, Mason Yang wrote:
> > Add a driver for Renesas R-Car Gen3 RPC-IF SPI controller.
> >
> > Signed-off-by: Mason Yang <masonccyang@...c.com.tw>
> > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
> [...]
> > diff --git a/drivers/spi/spi-renesas-rpc.c b/drivers/spi/spi-renesas-rpc.c
> > new file mode 100644
> > index 0000000..ea12017
> > --- /dev/null
> > +++ b/drivers/spi/spi-renesas-rpc.c
> > @@ -0,0 +1,804 @@
> [...]
> > +static void rpc_spi_hw_init(struct rpc_spi *rpc)
> > +{
> > +     //
> > +     // NOTE: The 0x260 are undocumented bits, but they must be set.
> > +     //      RPC_PHYCNT_STRTIM is strobe timing adjustment bit,
> > +     //      0x0 : the delay is biggest,
> > +     //      0x1 : the delay is 2nd biggest,
> > +     //      On H3 ES1.x, the value should be 0, while on others,
> > +     //      the value should be 6.
> > +     //
> > +     regmap_write(rpc->regmap, RPC_PHYCNT, RPC_PHYCNT_CAL |
> > +                               RPC_PHYCNT_STRTIM(6) | 0x260);
> > +
> > +     //
> > +     // NOTE: The 0x1511144 are undocumented bits, but they must be set
> > +     //       for RPC_PHYOFFSET1.
> > +     //       The 0x31 are undocumented bits, but they must be set
> > +     //       for RPC_PHYOFFSET2.
> > +     //
> > +     regmap_write(rpc->regmap, RPC_PHYOFFSET1, RPC_PHYOFFSET1_DDRTMG(3) |
> > +                  0x1511144);
> > +     regmap_write(rpc->regmap, RPC_PHYOFFSET2, 0x31 |
> > +                  RPC_PHYOFFSET2_OCTTMG(4));
> > +     regmap_write(rpc->regmap, RPC_SSLDR, RPC_SSLDR_SPNDL(7) |
> > +                  RPC_SSLDR_SLNDL(7) | RPC_SSLDR_SCKDL(7));
> > +     regmap_write(rpc->regmap, RPC_CMNCR, RPC_CMNCR_MD | RPC_CMNCR_SFDE |
> > +                  RPC_CMNCR_MOIIO_HIZ | RPC_CMNCR_IOFV_HIZ |
> > +                  RPC_CMNCR_BSZ(0));
> > +}
>
>    We clearly need runtime PM get/put() calls around this code. Otherwise,
> we're dependant on U-Boot leaving the clocks enabled...

Even that would be futile, as the common clock framework disables all
unused clocks at late boot time.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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