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Date:   Fri, 08 Mar 2019 09:53:14 +0800
From:   Xiaoyao Li <xiaoyao.li@...ux.intel.com>
To:     Paolo Bonzini <pbonzini@...hat.com>,
        Sean Christopherson <sean.j.christopherson@...el.com>
Cc:     Radim Krčmář <rkrcmar@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
        kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] kvm/x86/vmx: Make the emulation of
 MSR_IA32_ARCH_CAPABILITIES only for vmx

On Thu, 2019-03-07 at 19:15 +0100, Paolo Bonzini wrote:
> On 07/03/19 18:37, Sean Christopherson wrote:
> > On Thu, Mar 07, 2019 at 05:31:43PM +0800, Xiaoyao Li wrote:
> > > At present, we report F(ARCH_CAPABILITIES) for x86 arch(both vmx and svm)
> > > unconditionally, but we only emulate this MSR in vmx. It will cause #GP
> > > while guest kernel rdmsr(MSR_IA32_ARCH_CAPABILITIES) in an AMD host.
> > > 
> > > Since MSR IA32_ARCH_CAPABILITIES is an intel-specific MSR, it makes no
> > > sense to emulate it in svm. Thus this patch chooses to only emulate it
> > > for vmx, and moves the related handling to vmx related files.
> > 
> > What about emulating the MSR on an AMD host for testing purpsoes?  It
> > might be a useful way for someone without Intel hardware to test spectre
> > related flows.
> > 
> > In other words, an alternative to restricting emulation of the MSR to
> > Intel CPUS would be to move MSR_IA32_ARCH_CAPABILITIES handling into
> > kvm_{get,set}_msr_common().  Guest access to MSR_IA32_ARCH_CAPABILITIES
> > is gated by X86_FEATURE_ARCH_CAPABILITIES in the guest's CPUID, e.g.
> > RDMSR will naturally #GP fault if userspace passes through the host's
> > CPUID on a non-Intel system.
> 
> This is also better because it wouldn't change the guest ABI for AMD
> processors.  Dropping CPUID flags is generally not a good idea.
> 
> Paolo

Hi, Paolo and Sean,

OK, as you think it's better to emulate MSR ARCH_CAPABILITIES on all x86 host,
so should I make the same to MSR CORE_CAPABILITY?

If so, I will make it for our v5 patches of split lock detection to emualte MSR
CORE_CAPABILITY in this way.

Thanks,
Xiaoyao


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