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Message-ID: <CAJ2_jOFtg2_MAUYkTQM-=6KE2RN+FMxfEhLjZZfzM0k3A5RQiA@mail.gmail.com>
Date: Mon, 11 Mar 2019 17:10:17 +0530
From: Yash Shah <yash.shah@...ive.com>
To: Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>
Cc: Palmer Dabbelt <palmer@...ive.com>, linux-pwm@...r.kernel.org,
linux-riscv@...ts.infradead.org,
Thierry Reding <thierry.reding@...il.com>, robh+dt@...nel.org,
mark.rutland@....com, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Sachin Ghadi <sachin.ghadi@...ive.com>,
Paul Walmsley <paul.walmsley@...ive.com>, kernel@...gutronix.de
Subject: Re: [PATCH v8 2/2] pwm: sifive: Add a driver for SiFive SoC PWM
On Fri, Mar 8, 2019 at 5:27 PM Uwe Kleine-König
<u.kleine-koenig@...gutronix.de> wrote:
>
> Hello,
>
> On Fri, Mar 08, 2019 at 04:59:36PM +0530, Yash Shah wrote:
> > On Thu, Mar 7, 2019 at 8:57 PM Uwe Kleine-König
> > <u.kleine-koenig@...gutronix.de> wrote:
> > > > +static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *dev,
> > > > + struct pwm_state *state)
> > > > +{
> > > > + struct pwm_sifive_ddata *pwm = pwm_sifive_chip_to_ddata(chip);
> > > > + unsigned int duty_cycle, x;
> > > > + u32 frac;
> > > > + struct pwm_state cur_state;
> > > > + bool enabled;
> > > > + int ret = 0;
> > > > + unsigned long num;
> > > > +
> > > > + if (state->polarity != PWM_POLARITY_INVERSED)
> > > > + return -EINVAL;
> > > > +
> > > > + mutex_lock(&pwm->lock);
> > > > + pwm_get_state(dev, &cur_state);
> > > > + enabled = cur_state.enabled;
> > > > +
> > > > + if (state->period != cur_state.period) {
> > >
> > > Did you test this with more than one consumer? For sure the following
> > > should work:
> > >
> > > pwm1 = pwm_get(.. the first ..);
> > > pwm_apply_state(pwm1, { .enabled = true, .period = 10000000, .... });
> > >
> > > pwm2 = pwm_get(.. the second ..);
> > > pwm_apply_state(pwm2, { .enabled = true, .period = 10000000, .... });
> > >
> > > but for the second pwm_apply_state() run state->period is likely not
> > > exactly 10000000.
> >
> > Yes, I have tested multiple consumers using sysfs interface. It is working.
>
> Can you provide details about your testing here? What is the parent clk
> rate? Which settings did you test? Can you confirm my claim that the
> above sequence would fail or point out my error in reasoning?
>
I have tested on HiFive Unleashed board using sysfs interface.
Parent clk rate is around 512 Mhz.
I have tested scenarios as you mentioned above with various period and
duty_cycle values.
After considering your below suggestion,
| To get the result independent of the prior configuration you better use
| the real targeted period length as input instead of the last configured
| approximation
I will introduce approx_period feild, which will be used as the
targeted period length.
Also, in pwm_sifive_get_state, I will make below change
- state->period = pwm->real_period;
+ state->period = pwm->approx_period.
So with this change in place, I believe the cur_state.period for the
second pwm_apply_state() above (pwm2) will be exactly 10000000
> > > > + x = 1U << PWM_SIFIVE_CMPWIDTH;
> > > > + num = (u64)duty_cycle * x + x / 2;
> > > > + frac = div_u64(num, state->period);
> > >
> > > I don't understand the "+ x / 2" part. Should this better be
> > > "+ state->period / 2"? Something like
> >
> > This eqn is as per your comments against v5 of this patch series.
> > frac = (duty_cycle * (1 << PWM_SIFIVE_CMPWIDTH) + (1 <<
> > PWM_SIFIVE_CMPWIDTH) / 2) / period;
>
> OK, then not only the code is wrong, but also my suggestion was. :-)
>
> > > #define div_u64_round(a, b) ({typeof(b) __b = b; div_u64(a + __b / 2, __b)})
> > >
> > > would make this less error prone.
>
> This still stands. It makes it easier to get the code right and makes it
> easier to understand.
Sure, will implement this.
>
> Best regards
> Uwe
>
> --
> Pengutronix e.K. | Uwe Kleine-König |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
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