linux-kernel - Re: [PATCH v3 7/8] KVM:X86: Add XSS bit 11 and 12 support for CET xsaves/xrstors.

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Message-ID: <20190310122030.GB24065@local-michael-cet-test.sh.intel.com>
Date:   Sun, 10 Mar 2019 20:20:30 +0800
From:   Yang Weijiang <weijiang.yang@...el.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     Sean Christopherson <sean.j.christopherson@...el.com>,
        rkrcmar@...hat.com, jmattson@...gle.com,
        linux-kernel@...r.kernel.org, kvm@...r.kernel.org, mst@...hat.com,
        yu-cheng.yu@...el.com, Zhang Yi Z <yi.z.zhang@...ux.intel.com>
Subject: Re: [PATCH v3 7/8] KVM:X86: Add XSS bit 11 and 12 support for CET
 xsaves/xrstors.

On Fri, Mar 08, 2019 at 12:32:04PM +0100, Paolo Bonzini wrote:
> On 28/02/19 09:44, Yang Weijiang wrote:
> >>>  		if (!vmx_xsaves_supported())
> >>>  			return 1;
> >>> +
> >>>  		/*
> >>> -		 * The only supported bit as of Skylake is bit 8, but
> >>> -		 * it is not supported on KVM.
> >>> +		 * Check bits being set are supported in KVM.
> >> I'd drop the comment altogether, it's pretty obvious from the code that
> >> were checking which bits are supported.
> > you won't see these redundancies in next version ;)
> >>>  		 */
> >>> -		if (data != 0)
> >>> +		if (data & ~kvm_supported_xss())
> >>>  			return 1;
> 
> You should instead check this against CPUID[0xD, 1].EDX:ECX.  If CET is
> disabled in CPUID, the guest should not be able to set it in MSR_IA32_CSS.
> 
> Paolo
Thanks, OK, will change it.