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Message-ID: <alpine.DEB.2.21.1903111516190.1691@nanos.tec.linutronix.de>
Date:   Mon, 11 Mar 2019 15:22:25 +0100 (CET)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Linus Torvalds <torvalds@...ux-foundation.org>
cc:     Kees Cook <keescook@...omium.org>,
        Linux List Kernel Mailing <linux-kernel@...r.kernel.org>,
        the arch/x86 maintainers <x86@...nel.org>
Subject: Re: [GIT pull] x86/asm for 5.1

On Sun, 10 Mar 2019, Linus Torvalds wrote:
> On Sun, Mar 10, 2019 at 4:33 AM Thomas Gleixner <tglx@...utronix.de> wrote:
> Finally, I suspect this is all subtly buggy anyway, because your
> 'cr4_pin' thing is a global variable, but the cr4 bits are per-cpu,
> and I don't see how this works with the different CPU's setting things
> up one after each other, but the first one sets the pinned bits.
> 
> So it basically "pins" the bits on CPU's before they are ready, so the
> secondary CPU's maghically get the bits set _independently_ of running
> the actual setup code to set them. That may *work*, but it sure looks
> iffy.

Which I looked at and it's a non issue. The SMAP/SMEP settings are globally
the same and the non-boot CPUs set the bits very early in the boot process.

Thanks,

	tglx

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