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Message-ID: <alpine.DEB.2.21.9999.1903120927450.26459@viisi.sifive.com>
Date:   Tue, 12 Mar 2019 09:31:43 -0700 (PDT)
From:   Paul Walmsley <paul.walmsley@...ive.com>
To:     Yash Shah <yash.shah@...ive.com>
cc:     linux-riscv@...ts.infradead.org, linux-edac@...r.kernel.org,
        palmer@...ive.com, paul.walmsley@...ive.com,
        linux-kernel@...r.kernel.org, robh+dt@...nel.org,
        mark.rutland@....com, aou@...s.berkeley.edu, bp@...en8.de,
        mchehab@...nel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 2/2] sifive: edac: Add EDAC driver for Sifive l2 Cache
 Controller

Hello Yash,

On Tue, 12 Mar 2019, Yash Shah wrote:

> Add driver for the SiFive L2 cache controller
> on the HiFive Unleashed board

This should read "for the SiFive FU540-C000 chip" or something similar.  
The L2 cache controller is not specific to the HiFive Unleashed board.

Could you also please describe in your patch description:

1. what features this driver supports - in other words, why would it be 
used

2. and, if this driver was written based on any other drivers, please just 
briefly credit them.  For example, the use of the "teardown_*" function 
names suggest that this driver is at least partially based on
i10nm_base.c, skx_base.c, or pnd2_edac.c ?


thanks,

- Paul

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