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Date:   Mon, 18 Mar 2019 10:43:43 +0000
From:   Sudeep Holla <>
To:     Benjamin Gaignard <>
Subject: Re: [RESEND PATCH 0/7] Introduce bus domains controller framework

On Mon, Mar 18, 2019 at 11:05:58AM +0100, Benjamin Gaignard wrote:
> Bus domains controllers allow to divided system on chip into multiple domains
> that can be used to select by who hardware blocks could be accessed.
> A domain could be a cluster of CPUs (or coprocessors), a range of addresses or
> a group of hardware blocks.
> Framework architecture is inspirated by pinctrl framework:
> - a default configuration could be applied before bind the driver
> - configurations could be apllied dynamically by drivers
> - device node provides the bus domains configurations
> An example of bus domains controller is STM32 ETZPC hardware block
> which got 3 domains:
> - secure: hardware blocks are only accessible by software running on trust
>   zone.
> - non-secure: hardware blocks are accessible by non-secure software (i.e.
>   linux kernel).
> - coprocessor: hardware blocks are only accessible by the corpocessor.
> Up to 94 hardware blocks of the soc could be managed by ETZPC and
> assigned to one of the three domains.

You fail to explain why do we need this in non-secure Linux ?
You need to have solid reasons as why this can't be done in secure
firmware. And yes I mean even on arm32. On platforms with such hardware
capabilities you will need some secure firmware to be running and these
things can be done there. I don't want this enabled for ARM64 at all,
firmware *has to deal* with this.


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