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Message-ID: <3d3b5eff-0b66-ba90-bf56-11c5df0af6ed@baylibre.com>
Date: Tue, 19 Mar 2019 09:32:04 +0100
From: Neil Armstrong <narmstrong@...libre.com>
To: Maxime Jourdan <mjourdan@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>
Cc: Jian Hu <jian.hu@...ogic.com>, linux-clk@...r.kernel.org,
linux-amlogic@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: meson: g12a: fix VPU clock muxes mask
On 19/03/2019 09:26, Maxime Jourdan wrote:
> There are 8 parents, use 0x7
>
> Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
> Signed-off-by: Maxime Jourdan <mjourdan@...libre.com>
> ---
> drivers/clk/meson/g12a.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
> index cfb91df884cb..e52b0b53f398 100644
> --- a/drivers/clk/meson/g12a.c
> +++ b/drivers/clk/meson/g12a.c
> @@ -1391,7 +1391,7 @@ static const char * const g12a_vpu_parent_names[] = {
> static struct clk_regmap g12a_vpu_0_sel = {
> .data = &(struct clk_regmap_mux_data){
> .offset = HHI_VPU_CLK_CNTL,
> - .mask = 0x3,
> + .mask = 0x7,
> .shift = 9,
> },
> .hw.init = &(struct clk_init_data){
> @@ -1435,7 +1435,7 @@ static struct clk_regmap g12a_vpu_0 = {
> static struct clk_regmap g12a_vpu_1_sel = {
> .data = &(struct clk_regmap_mux_data){
> .offset = HHI_VPU_CLK_CNTL,
> - .mask = 0x3,
> + .mask = 0x7,
> .shift = 25,
> },
> .hw.init = &(struct clk_init_data){
>
Good catch !
I'll apply on fixes/drivers
Neil
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