[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20190319174823.29467-2-daniel.baluta@nxp.com>
Date: Tue, 19 Mar 2019 17:48:37 +0000
From: Daniel Baluta <daniel.baluta@....com>
To: "S.j. Wang" <shengjiu.wang@....com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>
CC: "angus@...ea.ca" <angus@...ea.ca>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
"ccaione@...libre.com" <ccaione@...libre.com>,
"baruch@...s.co.il" <baruch@...s.co.il>,
"agx@...xcpu.org" <agx@...xcpu.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
dl-linux-imx <linux-imx@....com>,
Aisheng Dong <aisheng.dong@....com>,
"kuninori.morimoto.gx@...esas.com" <kuninori.morimoto.gx@...esas.com>,
"spencercw@...il.com" <spencercw@...il.com>,
Daniel Baluta <daniel.baluta@....com>,
Anson Huang <anson.huang@....com>
Subject: [PATCH v7 1/4] arm64: dts: imx8mq: Add SDMA nodes
SDMA1 is part of AIPS-3 region and SDMA2 is part
of AIPS-1 region.
Signed-off-by: Anson Huang <Anson.Huang@....com>
Signed-off-by: Daniel Baluta <daniel.baluta@....com>
Reviewed-by: Fabio Estevam <festevam@...il.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 32a02027df92..7a62413bc1cd 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -251,6 +251,17 @@
status = "disabled";
};
+ sdma2: sdma@...c0000 {
+ compatible = "fsl,imx8mq-sdma","fsl,imx7d-sdma";
+ reg = <0x302c0000 0x10000>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>,
+ <&clk IMX8MQ_CLK_SDMA2_ROOT>;
+ clock-names = "ipg", "ahb";
+ #dma-cells = <3>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ };
+
iomuxc: iomuxc@...30000 {
compatible = "fsl,imx8mq-iomuxc";
reg = <0x30330000 0x10000>;
@@ -600,6 +611,17 @@
status = "disabled";
};
+ sdma1: sdma@...d0000 {
+ compatible = "fsl, imx8mq-sdma","fsl,imx7d-sdma";
+ reg = <0x30bd0000 0x10000>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
+ <&clk IMX8MQ_CLK_SDMA1_ROOT>;
+ clock-names = "ipg", "ahb";
+ #dma-cells = <3>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ };
+
fec1: ethernet@...e0000 {
compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec";
reg = <0x30be0000 0x10000>;
--
2.17.1
Powered by blists - more mailing lists