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Message-Id: <1553113540-28726-2-git-send-email-john.stultz@linaro.org>
Date: Wed, 20 Mar 2019 13:25:38 -0700
From: John Stultz <john.stultz@...aro.org>
To: lkml <linux-kernel@...r.kernel.org>
Cc: John Stultz <john.stultz@...aro.org>,
Tanglei Han <hantanglei@...wei.com>,
Zhuangluan Su <suzhuangluan@...ilicon.com>,
Ryan Grachek <ryan@...ted.us>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Wei Xu <xuwei5@...ilicon.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org
Subject: [PATCH 1/3] arm64: dts: hi3660: Add dma to uart nodes
Try to add DMA support to the uart nodes following
the assignments made in the dts from the victoria vendor kernel
here:
https://consumer.huawei.com/en/opensource/detail/?siteCode=worldwide&keywords=p10&fileType=openSourceSoftware&pageSize=10&curPage=1
Cc: Tanglei Han <hantanglei@...wei.com>
Cc: Zhuangluan Su <suzhuangluan@...ilicon.com>
Cc: Ryan Grachek <ryan@...ted.us>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Wei Xu <xuwei5@...ilicon.com>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>
Cc: linux-arm-kernel@...ts.infradead.org
Cc: devicetree@...r.kernel.org
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Signed-off-by: John Stultz <john.stultz@...aro.org>
---
v3:
* Remove dma enablment on uart0 which would use reserved channel 0
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 2f19e0e..a3eeab1 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -478,6 +478,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xfdf00000 0x0 0x1000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ dma-names = "rx", "tx";
+ dmas = <&dma0 2 &dma0 3>;
clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>,
<&crg_ctrl HI3660_CLK_GATE_UART1>;
clock-names = "uartclk", "apb_pclk";
@@ -490,6 +492,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xfdf03000 0x0 0x1000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ dma-names = "rx", "tx";
+ dmas = <&dma0 4 &dma0 5>;
clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>,
<&crg_ctrl HI3660_PCLK>;
clock-names = "uartclk", "apb_pclk";
@@ -514,6 +518,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xfdf01000 0x0 0x1000>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ dma-names = "rx", "tx";
+ dmas = <&dma0 6 &dma0 7>;
clocks = <&crg_ctrl HI3660_CLK_GATE_UART4>,
<&crg_ctrl HI3660_CLK_GATE_UART4>;
clock-names = "uartclk", "apb_pclk";
@@ -526,6 +532,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xfdf05000 0x0 0x1000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ dma-names = "rx", "tx";
+ dmas = <&dma0 8 &dma0 9>;
clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>,
<&crg_ctrl HI3660_CLK_GATE_UART5>;
clock-names = "uartclk", "apb_pclk";
--
2.7.4
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