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Message-ID: <AM6PR0402MB39113020252197C138A83DBBF5410@AM6PR0402MB3911.eurprd04.prod.outlook.com>
Date: Wed, 20 Mar 2019 06:47:20 +0000
From: Anson Huang <anson.huang@....com>
To: "mturquette@...libre.com" <mturquette@...libre.com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
Aisheng Dong <aisheng.dong@....com>,
"gustavo@...eddedor.com" <gustavo@...eddedor.com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
CC: dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH 1/2] clk: imx7ulp: remove snvs clock
Ping...
Best Regards!
Anson Huang
> -----Original Message-----
> From: Anson Huang
> Sent: 2019年2月28日 16:56
> To: mturquette@...libre.com; sboyd@...nel.org; shawnguo@...nel.org;
> s.hauer@...gutronix.de; kernel@...gutronix.de; festevam@...il.com;
> robh+dt@...nel.org; mark.rutland@....com; Aisheng Dong
> <aisheng.dong@....com>; gustavo@...eddedor.com; linux-
> clk@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org; devicetree@...r.kernel.org
> Cc: dl-linux-imx <linux-imx@....com>
> Subject: [PATCH 1/2] clk: imx7ulp: remove snvs clock
>
> Since i.MX7ULP B0 chip, the SNVS module is moved into M4 domain and its
> clock is also moved into PCC0 which is contorlled by M4, Linux kernel should
> NOT add it into clock tree.
>
> Signed-off-by: Anson Huang <Anson.Huang@....com>
> ---
> drivers/clk/imx/clk-imx7ulp.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx7ulp.c b/drivers/clk/imx/clk-imx7ulp.c
> index ce30663..6668210 100644
> --- a/drivers/clk/imx/clk-imx7ulp.c
> +++ b/drivers/clk/imx/clk-imx7ulp.c
> @@ -151,7 +151,6 @@ static void __init imx7ulp_clk_pcc2_init(struct
> device_node *np)
> clks[IMX7ULP_CLK_DMA1] = imx_clk_hw_gate("dma1",
> "nic1_clk", base + 0x20, 30);
> clks[IMX7ULP_CLK_RGPIO2P1] = imx_clk_hw_gate("rgpio2p1",
> "nic1_bus_clk", base + 0x3c, 30);
> clks[IMX7ULP_CLK_DMA_MUX1] =
> imx_clk_hw_gate("dma_mux1", "nic1_bus_clk", base + 0x84, 30);
> - clks[IMX7ULP_CLK_SNVS] = imx_clk_hw_gate("snvs",
> "nic1_bus_clk", base + 0x8c, 30);
> clks[IMX7ULP_CLK_CAAM] = imx_clk_hw_gate("caam",
> "nic1_clk", base + 0x90, 30);
> clks[IMX7ULP_CLK_LPTPM4] = imx7ulp_clk_composite("lptpm4",
> periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base +
> 0x94);
> clks[IMX7ULP_CLK_LPTPM5] = imx7ulp_clk_composite("lptpm5",
> periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base +
> 0x98);
> --
> 2.7.4
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