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Message-ID: <20190321231055.j7z23f3k3rcngq4u@archlinux.localdomain>
Date: Thu, 21 Mar 2019 19:10:55 -0400
From: Gaël PORTAY <gael.portay@...labora.com>
To: Matthias Kaehlcke <mka@...omium.org>
Cc: Mark Rutland <mark.rutland@....com>, devicetree@...r.kernel.org,
Derek Basehore <dbasehore@...omium.org>,
Heiko Stuebner <heiko@...ech.de>, linux-pm@...r.kernel.org,
Brian Norris <briannorris@...omium.org>,
Douglas Anderson <dianders@...omium.org>,
linux-kernel@...r.kernel.org, Chanwoo Choi <cw00.choi@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
Rob Herring <robh+dt@...nel.org>,
Klaus Goger <klaus.goger@...obroma-systems.com>,
MyungJoo Ham <myungjoo.ham@...sung.com>,
Enric Balletbo i Serra <enric.balletbo@...labora.com>,
linux-rockchip@...ts.infradead.org, Randy Li <ayaka@...lik.info>,
kernel@...labora.com, linux-arm-kernel@...ts.infradead.org,
Lin Huang <hl@...k-chips.com>
Subject: Re: [PATCH v2 3/5] devfreq: rk3399_dmc: Pass ODT and auto power down
parameters to TF-A.
Matthias,
On Wed, Mar 20, 2019 at 03:02:23PM -0700, Matthias Kaehlcke wrote:
> Hi Gaël,
>
> On Wed, Mar 20, 2019 at 05:50:13PM -0400, Gaël PORTAY wrote:
> > Hi Matthias,
> >
> > On Tue, Mar 19, 2019 at 05:33:52PM -0700, Matthias Kaehlcke wrote:
> > > ...
> > > > @@ -95,6 +103,19 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
> > > >
> > > > mutex_lock(&dmcfreq->lock);
> > > >
> > > > + if (target_rate >= dmcfreq->odt_dis_freq)
> > > > + odt_enable = true;
> > > > +
> > > > + /*
> > > > + * This makes a SMC call to the TF-A to set the DDR PD (power-down)
> > > > + * timings and to enable or disable the ODT (on-die termination)
> > > > + * resistors.
> > > > + */
> > > > + arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0,
> > > > + dmcfreq->odt_pd_arg1,
> > > > + ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD,
> > > > + odt_enable, 0, 0, 0, &res);
> > >
> > > Is it necessary/desirable to make this call for every frequency
> > > change? IIUC it should be only needed when odt_enable changes and the
> > > driver could track the state. If the DDR frequency doesn't change too
> > > often and the overhead of the call is small it shouldn't be really
> > > important though.
> > >
> >
> > I will test your solution first to make sure there is no regression to
> > run that call for frequency change only.
>
Oops, I wanted to say when odt_enable changes since last call.
> If there is no frequency change the function returns at the
> beginning. My suggestion was to only do the call when 'odt_enable'
> changes, i.e. when a change (up or down) passes the 'odt_dis_freq'
> threshold.
>
So, for a reason that I ignore, if we try to save unecessary calls to
ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD (odt_enable has not changed since
last call), we get stalled in the call to ROCKCHIP_SIP_CONFIG_SET_RAGE
that follows. The function arm_smccc_smc never returns and the device
hard hang.
Thanks to your remark, I have also fixed an issue with the odt_dis_freq
value. Its value is initialized to 0 in the probe function. Thus the
odt_enable is always true (target_rate > 0). I moved its initialization
after the timings are parsed from the device-tree; its value is now none
zero (333000000 in my case).
> > Also, the call takes around 300us.
>
> Thanks for the info!
>
> Matthias
>
> _______________________________________________
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Gaël
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