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Message-Id: <20190321231440.19031-6-gael.portay@collabora.com>
Date: Thu, 21 Mar 2019 19:14:40 -0400
From: Gaël PORTAY <gael.portay@...labora.com>
To: MyungJoo Ham <myungjoo.ham@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Rob Herring <robh+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>,
Enric Balletbo i Serra <enric.balletbo@...labora.com>,
Lin Huang <hl@...k-chips.com>,
Brian Norris <briannorris@...omium.org>,
Douglas Anderson <dianders@...omium.org>,
Klaus Goger <klaus.goger@...obroma-systems.com>,
Derek Basehore <dbasehore@...omium.org>,
Randy Li <ayaka@...lik.info>, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org
Cc: Mark Rutland <mark.rutland@....com>,
Gaël PORTAY <gael.portay@...labora.com>
Subject: [PATCH v3 5/5] arm64: dts: rockchip: Enable dmc and dfi nodes on gru.
From: Lin Huang <hl@...k-chips.com>
Enable the DMC (Dynamic Memory Controller) and the DFI (DDR PHY Interface)
nodes on gru/kevin boards so we can support DDR DVFS.
Signed-off-by: Lin Huang <hl@...k-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
Signed-off-by: Gaël PORTAY <gael.portay@...labora.com>
---
Changes in v3:
- [PATCH v2 5/5] Remove display_subsystem nodes.
Changes in v2:
- [PATCH 8/8] Move center-supply attribute of dmc node in file
rk3399-gru-chromebook.dtsi (where ppvar_centerlogic is
defined).
Changes in v1: None
.../boot/dts/rockchip/rk3399-gru-chromebook.dtsi | 4 ++++
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 16 ++++++++++++++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
index 931640e9aed4..cfb81356c61e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
@@ -400,3 +400,7 @@ ap_i2c_tp: &i2c5 {
rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+&dmc {
+ center-supply = <&ppvar_centerlogic>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index da03fa9c5662..1bde7ad3b980 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -289,6 +289,12 @@
status = "okay";
};
+&dmc_opp_table {
+ opp04 {
+ opp-suspend;
+ };
+};
+
/*
* Set some suspend operating points to avoid OVP in suspend
*
@@ -489,6 +495,16 @@ ap_i2c_audio: &i2c8 {
status = "okay";
};
+&dfi {
+ status = "okay";
+};
+
+&dmc {
+ status = "okay";
+ upthreshold = <25>;
+ downdifferential = <15>;
+};
+
&sdhci {
/*
* Signal integrity isn't great at 200 MHz and 150 MHz (DDR) gives the
--
2.21.0
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