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Message-Id: <20190321112237.10325-1-marc.zyngier@arm.com>
Date:   Thu, 21 Mar 2019 11:22:37 +0000
From:   Marc Zyngier <marc.zyngier@....com>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     Arnd Bergmann <arnd@...db.de>,
        Fabien Dessenne <fabien.dessenne@...com>,
        Fabrizio Castro <fabrizio.castro@...renesas.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Jianguo Chen <chenjianguo3@...wei.com>,
        Loic Pallardy <loic.pallardy@...com>,
        Rasmus Villemoes <linux@...musvillemoes.dk>,
        Rob Herring <robh@...nel.org>,
        Simon Horman <horms+renesas@...ge.net.au>,
        YueHaibing <yuehaibing@...wei.com>,
        Jason Cooper <jason@...edaemon.net>,
        linux-kernel@...r.kernel.org
Subject: [GIT PULL] irqchip updates for 5.1-rc2

Hi Thomas,

Here's a few irqchip updates for 5.1-rc2. Nothing really stands out,
this is the usual bunch of fixes, cleanups and DT binding updates.

Please pull,

	M.

The following changes since commit 28528fca4908142bd1a3247956cba56c9c667d71:

  irqchip/imx-irqsteer: Add multi output interrupts support (2019-02-22 09:23:46 +0000)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git tags/irqchip-5.1-2

for you to fetch changes up to fca269f201a8d9985c0a31fb60b15d4eb57cef80:

  irqchip/mbigen: Don't clear eventid when freeing an MSI (2019-03-21 11:08:26 +0000)

----------------------------------------------------------------
irqchip updates for 5.1, take #2

- irqsteer error handling fix
- GICv3 range coalescing fix
- stm32 coprocessor coexistence fixes
- mbigen MSI teardown fix
- non-DT secondary GIC infrastructure removed
- various cleanups (brcmstb-l2, mmp)
- new DT bindings (r8a774c0)

----------------------------------------------------------------
Arnd Bergmann (1):
      irqchip/imx-irqsteer: Fix of_property_read_u32() error handling

Fabien Dessenne (2):
      irqchip/stm32: Don't clear rising/falling config registers at init
      irqchip/stm32: Don't set rising configuration registers at init

Fabrizio Castro (1):
      dt-bindings: irqchip: renesas-irqc: Document r8a774c0 support

Jianguo Chen (1):
      irqchip/mbigen: Don't clear eventid when freeing an MSI

Marc Zyngier (1):
      irqchip/gic: Drop support for secondary GIC in non-DT systems

Rasmus Villemoes (1):
      irqchip/gic-v3-its: Fix comparison logic in lpi_range_cmp

YueHaibing (2):
      irqchip/brcmstb-l2: Make two init functions static
      irqchip/mmp: Make mmp_irq_domain_ops static

 .../bindings/interrupt-controller/renesas,irqc.txt |  1 +
 arch/arm/mach-cns3xxx/core.c                       |  2 +-
 drivers/irqchip/irq-brcmstb-l2.c                   |  4 +-
 drivers/irqchip/irq-gic-v3-its.c                   |  2 +-
 drivers/irqchip/irq-gic.c                          | 45 ++++++++--------------
 drivers/irqchip/irq-imx-irqsteer.c                 |  8 +++-
 drivers/irqchip/irq-mbigen.c                       |  3 ++
 drivers/irqchip/irq-mmp.c                          |  2 +-
 drivers/irqchip/irq-stm32-exti.c                   | 10 -----
 include/linux/irqchip/arm-gic.h                    |  3 +-
 10 files changed, 32 insertions(+), 48 deletions(-)

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