lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 21 Mar 2019 15:21:51 +0000
From:   Robin Murphy <robin.murphy@....com>
To:     Katsuhiro Suzuki <katsuhiro@...suster.net>,
        Heiko Stuebner <heiko@...ech.de>,
        linux-rockchip@...ts.infradead.org
Cc:     linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] arm64: dts: rockchip: add rk3399 UART DMAs

On 21/03/2019 14:40, Katsuhiro Suzuki wrote:
> Add UART dma channels as specified by the rk3399 TRM.

No UART4? That's arguably one of the more useful ones, since 1 and 3 
often end up muxed to ethernet instead.

Also, does UART DMA actually work yet? I guess I can try for myself once 
I get home, but I remember last time I looked it was bailing out because 
the 8250 driver wanted a dmaengine feature that the pl330 driver didn't 
implement.

Robin.

> Refer:
> RK3399 TRM V1.4: Chapter 12 DMA Controller
> 
> Signed-off-by: Katsuhiro Suzuki <katsuhiro@...suster.net>
> ---
>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 0301e3e01b38..4eed7aae6989 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -635,6 +635,8 @@
>   		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
>   		clock-names = "baudclk", "apb_pclk";
>   		interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
> +		dmas = <&dmac_peri 0>, <&dmac_peri 1>;
> +		dma-names = "tx", "rx";
>   		reg-shift = <2>;
>   		reg-io-width = <4>;
>   		pinctrl-names = "default";
> @@ -648,6 +650,8 @@
>   		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
>   		clock-names = "baudclk", "apb_pclk";
>   		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0>;
> +		dmas = <&dmac_peri 2>, <&dmac_peri 3>;
> +		dma-names = "tx", "rx";
>   		reg-shift = <2>;
>   		reg-io-width = <4>;
>   		pinctrl-names = "default";
> @@ -661,6 +665,8 @@
>   		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
>   		clock-names = "baudclk", "apb_pclk";
>   		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
> +		dmas = <&dmac_peri 4>, <&dmac_peri 5>;
> +		dma-names = "tx", "rx";
>   		reg-shift = <2>;
>   		reg-io-width = <4>;
>   		pinctrl-names = "default";
> @@ -674,6 +680,8 @@
>   		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
>   		clock-names = "baudclk", "apb_pclk";
>   		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
> +		dmas = <&dmac_peri 6>, <&dmac_peri 7>;
> +		dma-names = "tx", "rx";
>   		reg-shift = <2>;
>   		reg-io-width = <4>;
>   		pinctrl-names = "default";
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ