linux-kernel - Re: [RFC PATCH v2 1/5] mtd: cfi_cmdset_0002: Add support for polling status register

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Message-ID: <f92362a0678b07d22ccc0f271fe3483dc77364a9.camel@infinera.com>
Date:   Thu, 21 Mar 2019 18:11:04 +0000
From:   Joakim Tjernlund <Joakim.Tjernlund@...inera.com>
To:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "computersforpeace@...il.com" <computersforpeace@...il.com>,
        "vigneshr@...com" <vigneshr@...com>,
        "bbrezillon@...nel.org" <bbrezillon@...nel.org>,
        "marek.vasut@...il.com" <marek.vasut@...il.com>,
        "dwmw2@...radead.org" <dwmw2@...radead.org>,
        "richard@....at" <richard@....at>
CC:     "nsekhar@...com" <nsekhar@...com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "masonccyang@...c.com.tw" <masonccyang@...c.com.tw>,
        "tudor.ambarus@...rochip.com" <tudor.ambarus@...rochip.com>,
        "sergei.shtylyov@...entembedded.com" 
        <sergei.shtylyov@...entembedded.com>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "arnd@...db.de" <arnd@...db.de>
Subject: Re: [RFC PATCH v2 1/5] mtd: cfi_cmdset_0002: Add support for polling
 status register

On Thu, 2019-03-21 at 23:15 +0530, Vignesh Raghavendra wrote:
> 
> HyperFlash devices are compliant with CFI AMD/Fujitsu Extended Command
> Set(0x0002) for flash operations, therefore drivers/mtd/chips/cfi_cmdset_0002.c
> can be use as is. But these devices do not support DQ polling method of
> determining chip ready/good status. These flashes provide Status
> Register whose bits can be polled to know status of flash operation.
> 
> Cypress HyperFlash datasheet here[1], talks about CFI Amd/Fujitsu
> Extended Query version 1.5. Bit 0 of "Software Features supported" field
> of CFI Primary Vendor-Specific Extended Query table indicates
> presence/absence of status register and Bit 1 indicates whether or not
> DQ polling is supported. Using these bits, its possible to determine
> whether flash supports DQ polling or need to use Status Register.
> 
> Add support for polling status register to know device ready/status of
> erase/write operations when DQ polling is not supported.

Isn't this new Status scheme just a copy of Intels(cmdset_0001)?
If so I think the new status impl. in 0002 should borrow from 0001 as this is a
hardened and battle tested impl.

I know other modern 0002 chips supports both old and new impl. of Status and I world
guess that we will see more chips with new Status only.

 Jocke