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Date:   Fri, 22 Mar 2019 14:42:31 +0100
From:   Marc Gonzalez <marc.w.gonzalez@...e.fr>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     Kishon Vijay Abraham I <kishon@...com>,
        MSM <linux-arm-msm@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Can Guo <cang@...eaurora.org>,
        Vivek Gautam <vivek.gautam@...eaurora.org>,
        Evan Green <evgreen@...omium.org>,
        Jeffrey Hugo <jhugo@...eaurora.org>
Subject: Re: [PATCH] phy: qcom: qmp: Add SDM845 PCIe QMP PHY support

On 26/02/2019 07:59, Bjorn Andersson wrote:

> @@ -1384,6 +1536,11 @@ static int qcom_qmp_phy_init(struct phy *phy)
>  
>  	qcom_qmp_phy_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
>  
> +	if (cfg->pcs_misc_tbl) {
> +		qcom_qmp_phy_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl,
> +				       cfg->pcs_misc_tbl_num);
> +	}
> +
>  	/*
>  	 * UFS PHY requires the deassert of software reset before serdes start.
>  	 * For UFS PHYs that do not have software reset control bits, defer

I think it would be better to configure pcs_misc *before* pcs.
That would be closer to what downstream does (for 835 and 845 at least).

Also you don't need to test for NULL as that is already done in
qcom_qmp_phy_configure() -- and in fact even that test is redundant,
since the array is not dereferenced when count is 0.

When are you planning on sending a v2 of your PCIe series?

Regards.

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