linux-kernel - Re: [PATCH] crypto: caam - limit AXI pipeline to a depth of 1

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 22 Mar 2019 13:49:10 +0000
From:   Horia Geanta <horia.geanta@....com>
To:     Iuliana Prodan <iuliana.prodan@....com>,
        Herbert Xu <herbert@...dor.apana.org.au>,
        Aymen Sghaier <aymen.sghaier@....com>
CC:     "David S. Miller" <davem@...emloft.net>,
        "linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        dl-linux-imx <linux-imx@....com>
Subject: Re: [PATCH] crypto: caam - limit AXI pipeline to a depth of 1

On 3/22/2019 3:39 PM, Iuliana Prodan wrote:
> Some i.MX6 devices (imx6D, imx6Q, imx6DL, imx6S, imx6DP and imx6DQ) have
> an issue wherein AXI bus transactions may not occur in the correct order.
> This isn't a problem running single descriptors, but can be if running
> multiple concurrent descriptors. Reworking the CAAM driver to throttle
> to single requests is impractical, so this patch limits the AXI pipeline
> to a depth of one (from a default of 4) to preclude this situation from
> occurring.
> This patch applies to known affected platforms.
> 
> Signed-off-by: Radu Solea <radu.solea@....com>
> Signed-off-by: Iuliana Prodan <iuliana.prodan@....com>
Reviewed-by: Horia Geantă <horia.geanta@....com>

Thanks,
Horia