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Message-ID: <1553269010-15591-5-git-send-email-abel.vesa@nxp.com>
Date: Fri, 22 Mar 2019 15:37:03 +0000
From: Abel Vesa <abel.vesa@....com>
To: Stephen Boyd <sboyd@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Fabio Estevam <fabio.estevam@....com>,
Aisheng Dong <aisheng.dong@....com>,
Lucas Stach <l.stach@...gutronix.de>,
Sascha Hauer <kernel@...gutronix.de>
CC: "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Abel Vesa <abel.vesa@....com>
Subject: [RFC 04/19] clk: imx6q: Do not reparent uninitialized
IMX6QDL_CLK_PERIPH2 clock
The clock is registered later than these two re-parentings.
Signed-off-by: Abel Vesa <abel.vesa@....com>
---
drivers/clk/imx/clk-imx6q.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 708e7c5..c7b671e 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -291,12 +291,6 @@ static void mmdc_ch1_disable(void __iomem *ccm_base)
clk_set_parent(clk[IMX6QDL_CLK_PERIPH2_CLK2_SEL],
clk[IMX6QDL_CLK_PLL3_USB_OTG]);
- /*
- * Handshake with mmdc_ch1 module must be masked when changing
- * periph2_clk_sel.
- */
- clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_CLK2]);
-
/* Disable pll3_sw_clk by selecting the bypass clock source */
reg = readl_relaxed(ccm_base + CCM_CCSR);
reg |= CCSR_PLL3_SW_CLK_SEL;
@@ -311,8 +305,6 @@ static void mmdc_ch1_reenable(void __iomem *ccm_base)
reg = readl_relaxed(ccm_base + CCM_CCSR);
reg &= ~CCSR_PLL3_SW_CLK_SEL;
writel_relaxed(reg, ccm_base + CCM_CCSR);
-
- clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_PRE]);
}
/*
--
2.7.4
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