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Message-ID: <639a5bc6-f821-ee9d-1594-d02701321192@hygon.cn>
Date: Sat, 23 Mar 2019 00:19:01 +0800
From: Pu Wen <puwen@...on.cn>
To: Borislav Petkov <bp@...en8.de>
CC: "tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>,
"hpa@...or.com" <hpa@...or.com>, "x86@...nel.org" <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH] x86/cpu/hygon: Fix phys_proc_id calculation logic for
multi-die processor
On 2019/3/22 23:55, Borislav Petkov wrote:
> On Fri, Mar 22, 2019 at 06:43:00PM +0800, Pu Wen wrote:
>> Current codes direct use "phys_proc_id = initial_apicid >> bits", which
>
> Use proper english please - there's no "codes"
>
>> calc phys_proc_id from initial_apicid by shifting *bits*, will get
>
> ... or "calc"
Okay, will correct the spelling.
>> For Hygon family 18h CPU the socket ID should be obtained from ApicId[6].
>> To fix the problem and match ApicID field definition, adjust the shift
>> bits to 6 for all Hygon family 18h multi-die CPUs.
>
> Sounds to me like you're programming the initial APIC ID not
> the same way as AMD do...
In the same way.
>> Reference:
>> [1] https://www.amd.com/system/files/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf
>>
>> Signed-off-by: Pu Wen <puwen@...on.cn>
>> ---
>> arch/x86/kernel/cpu/hygon.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/x86/kernel/cpu/hygon.c b/arch/x86/kernel/cpu/hygon.c
>> index cf25405..2df6dd9 100644
>> --- a/arch/x86/kernel/cpu/hygon.c
>> +++ b/arch/x86/kernel/cpu/hygon.c
>> @@ -87,6 +87,9 @@ static void hygon_get_topology(struct cpuinfo_x86 *c)
>> if (!err)
>> c->x86_coreid_bits = get_count_order(c->x86_max_cores);
>>
>> + /* Socket ID is ApicId[6] for these processors. */
>> + c->phys_proc_id = c->apicid >> 6;
>
> That 6 is a magic number, I assume?
That 6 is not a magic number. It indicate bit 6 of ApicId. This calculation
is the same as the LLC ID calculation in cacheinfo_hygon_init_llc_id().
--
Regards,
Pu Wen
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