linux-kernel - [PATCH] riscv: fix accessing 8-byte variable from RV32

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <1553236624-31275-1-git-send-email-alankao@andestech.com>
Date:   Fri, 22 Mar 2019 14:37:04 +0800
From:   Alan Kao <alankao@...estech.com>
To:     <linux-kernel@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <palmer@...ive.com>
CC:     Alan Kao <alankao@...estech.com>,
        Greentime Hu <greentime@...estech.com>,
        Vincent Chen <deanbo422@...il.com>
Subject: [PATCH] riscv: fix accessing 8-byte variable from RV32

A memory save operation to 8-byte variable in RV32 is divided into
two sw instructions in the put_user macro.  The current fixup returns
execution flow to the second sw instead of the one after it.

This patch fixes this fixup code according to the load access part.

Signed-off-by: Alan Kao<alankao@...estech.com>
Cc: Greentime Hu <greentime@...estech.com>
Cc: Vincent Chen <deanbo422@...il.com>
---
 arch/riscv/include/asm/uaccess.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index a00168b..fb53a80 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -300,7 +300,7 @@ do {								\
 		"	.balign 4\n"				\
 		"4:\n"						\
 		"	li %0, %6\n"				\
-		"	jump 2b, %1\n"				\
+		"	jump 3b, %1\n"				\
 		"	.previous\n"				\
 		"	.section __ex_table,\"a\"\n"		\
 		"	.balign " RISCV_SZPTR "\n"			\
-- 
2.7.4