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Message-ID: <CAJZ5v0hBRXhQqqXp4wSe+EJNcsJRN5knx0DONnc5UTa+601mug@mail.gmail.com>
Date: Mon, 25 Mar 2019 11:06:36 +0100
From: "Rafael J. Wysocki" <rafael@...nel.org>
To: Borislav Petkov <bp@...en8.de>
Cc: "Rafael J. Wysocki" <rjw@...ysocki.net>, x86 <x86@...nel.org>,
LKML <linux-kernel@...r.kernel.org>,
Len Brown <len.brown@...el.com>,
Linux PM <linux-pm@...r.kernel.org>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Laura Abbott <labbott@...oraproject.org>,
Thomas Gleixner <tglx@...utronix.de>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...nel.org>,
Simon Schricker <sschricker@...e.de>,
Hannes Reinecke <hare@...e.de>
Subject: Re: [PATCH 1/2] PM / arch: x86: Rework the MSR_IA32_ENERGY_PERF_BIAS handling
On Fri, Mar 22, 2019 at 3:28 PM Borislav Petkov <bp@...en8.de> wrote:
>
> On Thu, Mar 21, 2019 at 11:18:01PM +0100, Rafael J. Wysocki wrote:
> > From: Rafael J. Wysocki <rafael.j.wysocki@...el.com>
> >
> > The current handling of MSR_IA32_ENERGY_PERF_BIAS in the kernel is
> > problematic, because it may cause changes made by user space to that
> > MSR (with the help of the x86_energy_perf_policy tool, for example)
>
> One more reason to control MSR accesses from userspace. I'm working on
> a series to even completely forbid accesses to some MSRs over /dev/msr
> so I think accessing MSR_IA32_ENERGY_PERF_BIAS solely over the new
> interface in patch 2 would be much better.
>
> So, you're carrying those and you'd like to have an ACK from me?
>
> Btw, a couple of nitpicks below.
>
> > Index: linux-pm/arch/x86/kernel/cpu/intel_epb.c
> > ===================================================================
> > --- /dev/null
> > +++ linux-pm/arch/x86/kernel/cpu/intel_epb.c
> > @@ -0,0 +1,131 @@
> > +// SPDX-License-Identifier: GPL-2.0
>
> ...
>
> > +static DEFINE_PER_CPU(u8, saved_epb);
> > +
> > +#define EPB_MASK 0x0fULL
> > +#define EPB_SAVED 0x10ULL
> > +
> > +static int intel_epb_save(void)
>
> I'd drop that "intel_epb_" prefix from those static functions, but your
> call...
They help indexing tools (elixir.bootlin.com and similar) a bit, so
I'd rather retain them.
> > +{
> > + u64 epb;
> > +
> > + rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb);
> > + /*
> > + * Ensure that saved_epb will always be nonzero after this write even if
> > + * the EPB value read from the MSR is 0.
> > + */
> > + this_cpu_write(saved_epb, (epb & EPB_MASK) | EPB_SAVED);
> > +
> > + return 0;
> > +}
>
> ...
>
> > Index: linux-pm/Documentation/admin-guide/pm/intel_epb.rst
> > ===================================================================
> > --- /dev/null
> > +++ linux-pm/Documentation/admin-guide/pm/intel_epb.rst
>
> WARNING: Missing or malformed SPDX-License-Identifier tag in line 1
> #345: FILE: Documentation/admin-guide/pm/intel_epb.rst:1:
Well, this is documentation, so ...
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