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Message-ID: <SN6PR12MB263952B80F35F51AECB6AFFAF85F0@SN6PR12MB2639.namprd12.prod.outlook.com>
Date: Tue, 26 Mar 2019 19:15:29 +0000
From: "Ghannam, Yazen" <Yazen.Ghannam@....com>
To: Borislav Petkov <bp@...en8.de>
CC: "linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] EDAC/amd64: Use maximum channel count for the EDAC
channel layer size
> -----Original Message-----
> From: Borislav Petkov <bp@...en8.de>
> Sent: Tuesday, March 26, 2019 10:55 AM
> To: Ghannam, Yazen <Yazen.Ghannam@....com>
> Cc: linux-edac@...r.kernel.org; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH] EDAC/amd64: Use maximum channel count for the EDAC channel layer size
>
> On Mon, Mar 25, 2019 at 08:33:30PM +0000, Ghannam, Yazen wrote:
> > From: Yazen Ghannam <yazen.ghannam@....com>
> >
> > The AMD64 EDAC module current hardcodes the EDAC channel layer size
> > (count) to two. Future AMD systems may have more channels than this.
> >
> > Set the EDAC channel layer size equal to the maximum number of channels
> > possible for the system. On Family 17h and later, this is set in the
> > num_umcs variable. Older systems will continue to use two as the
> > default.
> >
> > Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
> > ---
> > drivers/edac/amd64_edac.c | 8 +++++++-
> > 1 file changed, 7 insertions(+), 1 deletion(-)
>
> Ok, whole pile here:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git/log/?h=edac-for-5.2-amd64
>
> Please run it to check all is still good.
>
Just tested on a fully populated system. Everything seems to be okay.
Thanks,
Yazen
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