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Date:   Tue, 26 Mar 2019 12:50:24 +0000
From:   Philippe CORNU <philippe.cornu@...com>
To:     Yannick FERTRE <yannick.fertre@...com>,
        Thierry Reding <thierry.reding@...il.com>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-stm32@...md-mailman.stormreply.com" 
        <linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH] drm/panel: otm8009a: set clock to 29.70 Mhz

Dear Yannick,
Many thanks for your patch.

Reviewed-by: Philippe Cornu <philippe.cornu@...com>
Tested-by: Philippe Cornu <philippe.cornu@...com>

Philippe :-)


On 3/21/19 9:07 AM, Yannick Fertré wrote:
> The panel does not support clock frequency over 30.74 Mhz.
> The clock rate has been reduced to 29.70 Mhz & new timings have
> been computed to get a framerate of 50fps.
> 
> Signed-off-by: Yannick Fertré <yannick.fertre@...com>
> ---
>   drivers/gpu/drm/panel/panel-orisetech-otm8009a.c | 14 +++++++-------
>   1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
> index 87fa316..f715bbe 100644
> --- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
> +++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
> @@ -67,15 +67,15 @@ struct otm8009a {
>   };
>   
>   static const struct drm_display_mode default_mode = {
> -	.clock = 32729,
> +	.clock = 29700,
>   	.hdisplay = 480,
> -	.hsync_start = 480 + 120,
> -	.hsync_end = 480 + 120 + 63,
> -	.htotal = 480 + 120 + 63 + 120,
> +	.hsync_start = 480 + 98,
> +	.hsync_end = 480 + 98 + 32,
> +	.htotal = 480 + 98 + 32 + 98,
>   	.vdisplay = 800,
> -	.vsync_start = 800 + 12,
> -	.vsync_end = 800 + 12 + 12,
> -	.vtotal = 800 + 12 + 12 + 12,
> +	.vsync_start = 800 + 15,
> +	.vsync_end = 800 + 15 + 10,
> +	.vtotal = 800 + 15 + 10 + 14,
>   	.vrefresh = 50,
>   	.flags = 0,
>   	.width_mm = 52,
> 

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