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Message-ID: <8358b1d4-a479-2c2f-13b3-411832a13278@free.fr>
Date: Tue, 26 Mar 2019 17:10:30 +0100
From: Marc Gonzalez <marc.w.gonzalez@...e.fr>
To: Kishon Vijay Abraham I <kishon@...com>
Cc: Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <andy.gross@...aro.org>,
Jeffrey Hugo <jhugo@...eaurora.org>,
Evan Green <evgreen@...omium.org>,
MSM <linux-arm-msm@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>,
Vivek Gautam <vivek.gautam@...eaurora.org>,
Stanimir Varbanov <svarbanov@...sol.com>
Subject: Re: [PATCH v2 1/2] phy: qcom-qmp: Add msm8998 PCIe QMP PHY support
On 26/03/2019 14:24, Marc Gonzalez wrote:
> +static const struct qmp_phy_cfg msm8998_pciephy_cfg = {
> + .type = PHY_TYPE_PCIE,
> + .nlanes = 1,
> +
> + .serdes_tbl = msm8998_pcie_serdes_tbl,
> + .serdes_tbl_num = ARRAY_SIZE(msm8998_pcie_serdes_tbl),
> + .tx_tbl = msm8998_pcie_tx_tbl,
> + .tx_tbl_num = ARRAY_SIZE(msm8998_pcie_tx_tbl),
> + .rx_tbl = msm8998_pcie_rx_tbl,
> + .rx_tbl_num = ARRAY_SIZE(msm8998_pcie_rx_tbl),
> + .pcs_tbl = msm8998_pcie_pcs_tbl,
> + .pcs_tbl_num = ARRAY_SIZE(msm8998_pcie_pcs_tbl),
> + .clk_list = msm8996_phy_clk_l,
> + .num_clks = ARRAY_SIZE(msm8996_phy_clk_l),
> + .reset_list = msm8996_pciephy_reset_l,
> + .num_resets = ARRAY_SIZE(msm8996_pciephy_reset_l),
Looking more closely at the code downstream, it looks like the
reset situation is slightly different. Let me spin a v3.
Regards.
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