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Message-ID: <4021516e-6a1e-166d-a4f6-e961e6f94cc4@redhat.com>
Date: Wed, 27 Mar 2019 16:38:32 -0400
From: Carlos O'Donell <codonell@...hat.com>
To: Martin Schwidefsky <schwidefsky@...ibm.com>,
Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
Cc: Paul Burton <paul.burton@...s.com>,
Will Deacon <will.deacon@....com>,
Boqun Feng <boqun.feng@...il.com>,
Heiko Carstens <heiko.carstens@...ibm.com>,
Vasily Gorbik <gor@...ux.ibm.com>,
Russell King <linux@...linux.org.uk>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
carlos <carlos@...hat.com>, Florian Weimer <fweimer@...hat.com>,
Joseph Myers <joseph@...esourcery.com>,
Szabolcs Nagy <szabolcs.nagy@....com>,
libc-alpha <libc-alpha@...rceware.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ben Maurer <bmaurer@...com>,
Peter Zijlstra <peterz@...radead.org>,
"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
Dave Watson <davejwatson@...com>, Paul Turner <pjt@...gle.com>,
Rich Felker <dalias@...c.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
linux-api <linux-api@...r.kernel.org>
Subject: Re: [PATCH 1/4] glibc: Perform rseq(2) registration at C startup and
thread creation (v7)
On 3/27/19 5:16 AM, Martin Schwidefsky wrote:
> On Mon, 25 Mar 2019 11:54:32 -0400 (EDT)
> Mathieu Desnoyers <mathieu.desnoyers@...icios.com> wrote:
>
>>>> +++ b/sysdeps/unix/sysv/linux/s390/bits/rseq.h
>> [...]
>>>> +
>>>> +/* Signature required before each abort handler code. */
>>>> +#define RSEQ_SIG 0x53053053
>>>
>>> Why not a s390 specific value here?
>>
>> s390 also has the abort handler in a __rseq_failure section:
>>
>> #define RSEQ_ASM_DEFINE_ABORT(label, teardown, abort_label) \
>> ".pushsection __rseq_failure, \"ax\"\n\t" \
>> ".long " __rseq_str(RSEQ_SIG) "\n\t" \
>> __rseq_str(label) ":\n\t" \
>> teardown \
>> "j %l[" __rseq_str(abort_label) "]\n\t" \
>> ".popsection\n\t"
>>
>> Same question applies as powerpc: since disassemblers will try to decode
>> that instruction, would it be better to define it as a valid one ?
>>
>> [...]
>
> A 4-byte sequence starting with 0x53 is decoded as a "diebr" instruction.
> And please replace that "j %l[...]" with a "jg %l[...]", the branch target
> range of the "j" instruction is 64K, not enough for the general case.
Why was this particular operated selected?
So on s390 the RSEQ_SIG will show up as an unexpected "divide to integer"
instruction that can't be reached by any control flow?
Can we use a NOP with a unique value in an immediate operand?
The goal being to have something that won't confuse during a debug
session, or that the debugger can ignore (like constant pools on Arm)
--
Cheers,
Carlos.
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